Ix-10 index – LSI 53C875A User Manual
Page 320
IX-10
Index
Ultra SCSI (Cont.)
single-ended transfers
20.0 Mbytes (16-bit transfers)
quadrupled 40 MHz clock
20.0 Mbytes (8-bit transfers)
40 MHz clock
synchronous data transfers
unexpected disconnect (UDC)
,
updated address (UA)
upper register address line (A7)
use data8/SFBR
V
VDD
-A
-core
vendor
ID (VID)
unique enhancement, bit 1 (VUE1)
unique enhancements, bit 0 (VUE0)
version (VER[2:0])
VSS
-A
-core
W
wait
disconnect instruction
for a disconnect
for valid phase
reselect instruction
select instruction
wide SCSI
chained block moves
receive (WSR)
receive bit
send (WSS)
send bit
won arbitration (WOA)
write
read instructions
read system memory from SCRIPTS
write and invalidate
enable (WIE)
enable (WRIE)
WSR bit
WSS flag