Index ix-5 – LSI 53C875A User Manual
Page 315
Index
IX-5
DMA
interrupt (Cont.)
pending (DIP)
mode (DMODE)
SCRIPTS
pointer (DSP)
pointer save (DSPS)
status (DSTAT)
DMA next
address (DNAD)
address 64 (DNAD64)
DMODE
register
DSA
relative
relative selector (DRS)
DSPS register
DSTAT
,
dual address cycles
command
dynamic block move selector (DBMS)
E
enable
64-bit
direct BMOV (EN64DBMV)
table indirect BMOV (EN64TIBMV)
bus mastering (EBM)
I/O space (EIS)
jump on nondata phase mismatches (ENNDJ)
memory space (EMS)
parity
checking
checking (EPC)
error response (EPER)
phase mismatch jump (ENPMJ)
read
line (ERL)
multiple (ERMP)
response to
reselection (RRE)
selection (SRE)
wide SCSI (EWS)
enabling cache mode
encoded
chip SCSI ID (ENC)
destination SCSI ID
(ENC)
(ENID)
SCSI destination ID
entry storage address (ESA)
error reporting signals
even parity
expansion ROM base
address (ERBA)
address register
extend SREQ/SACK filtering (EXT)
external
clock
memory interface
configuration
slow memory
external memory interface
multiple byte accesses
extra clock cycle of data setup (EXC)
F
fetch
enable (FE)
pin mode (FM)
FIFO
byte control (FBL[2:0])
byte control (FBL3)
flags (FF[3:0])
flags, bit 4 (FF4)
first dword
,
,
,
flush DMA FIFO (FLF)
flushing (FLSH)
FRAME/
frequency lock (LOCK)
full arbitration, selection/reselection
function complete
(CMP)
,
G
general purpose
(GPREG0)
I/O (GPIO)
I/O pin 0
I/O pin 1
I/O pin 2
I/O pin 3
I/O pin 4
pin control zero (GPCNTL0)
timer expired (GEN)
,
timer period (GEN[3:0])
timer scale factor (GENSF)
GNT/
GPIO enable, bits [1:0] (GPIO[1:0])
GPIO enable, bits [4:2] (GPIO[4:2])
GPIO0_ FETCH/
GPIO1_ MASTER/
GPIO2
GPIO3
GPIO4
grant
H
halt SCSI clock (HSC)
halting
handshake-to-handshake timer
bus activity enable (HTHBA)
expired (HTH)
period (HTH[3:0])
scale factor (HTHSF)
hardware control of SCSI activity LED
hardware interrupts
header type (HT)
high impedance mode (SZM)
high impedance mode (ZMODE)
I
I/O
instructions
read command
space
,
write command