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Bank a bank b bank c, Bank c (adc c and d) – Sundance SMT384 User Manual

Page 24

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Version 1.4

Page 24 of 47

SMT384 User Manual

Bank

A Bank

B Bank

C

1 3 5 7

41 43

81 83




2 4 6 8

Bank C (ADC C and D)

Pin No

Pin Name

Signal Description

Pin No

Pin Name

Signal Description

Dir

Daughter Card to Main Module

Dir

Daughter Card to Main Module

81

DOAQ0p

Data Out 0, Channel C.

82

DOBQ0p

Data Out 1, Channel C.

83

DOAQ0n

Data Out 2, Channel C.

84

DOBQ0n

Data Out 3, Channel C.

Dir

Daughter Card to Main Module

Dir

Daughter Card to Main Module

85

DOAQ1p

Data Out 4, Channel C.

86

DOBQ1p

Data Out 5, Channel C.

87

DOAQ1n

Data Out 6, Channel C.

88

DOBQ1n

Data Out 7, Channel C.

Dir

Daughter Card to Main Module

Dir

Daughter Card to Main Module

89

DOAQ2p

Data Out 8, Channel C.

90

DOBQ2p

Data Out 9, Channel C.

91

DOAQ2n

Data Out 10, Channel C.

92

DOBQ2n

Data Out 11, Channel C.

Dir

Daughter Card to Main Module

Dir

Daughter Card to Main Module

93

DOAQ3p

Data Out 12, Channel C.

94

DOBQ3p

Data Out 13, Channel C.

95

DOAQ3n

Over Range, Channel C.

96

DOBQ3n

Data Out 0, Channel D.

Dir

Daughter Card to Main Module

Dir

Daughter Card to Main Module

97

DOAQ4p

Data Out 1, Channel D.

98

DOBQ4p

Data Out 2, Channel D.

99

DOAQ4n

Data Out 3, Channel D.

100

DOBQ4n

Data Out 4, Channel D.

Dir

Daughter Card to Main Module

Dir

Daughter Card to Main Module

101

DOAQ5p

Data Out 5, Channel D.

102

DOBQ5p

Data Out 6, Channel D.

103

DOAQ5n

Data Out 7, Channel D.

104

DOBQ5n

Data Out 8, Channel D.

Dir

Daughter Card to Main Module

Dir

Daughter Card to Main Module

105

DOAQ6p

Data Out 9, Channel D.

106

DOBQ6p

Data Out 10, Channel D.

107

DOAQ6n

Data Out 11, Channel D.

108

DOBQ6n

Data Out 12, Channel D.

Dir

Daughter Card to Main Module

Dir

Daughter Card to Main Module

109

DOAQ7p

Data Out 13, Channel D.

110

DOBQ7p

Over Range, Channel D.

111

DOAQ7n

Led ADC C and D.

112

DOBQ7n

ADC C and D Format (binary, 2’s).

Dir

Daughter Card to Main Module

Dir

Daughter Card to Main Module

113

ClkOIp

Data Clock Out, Channel C.

114

DOIRIp

ADC C and D Reset.

115

ClkOIn

Data Clock Out, Channel D.

116

DOIRIn

ADC A and B Output Enable.

Dir Reserved.

Dir Reserved.

117

Reserved.

Reserved.

118

Reserved

ADC C and D External Trigger, P.

119

Reserved.

Reserved.

120

Reserved

ADC C and D External Trigger, N.

Figure 13 – Daughter Module Interface: Data Signals Connector and Pinout (Bank C).