Measurement Computing CIO-DAS16 - Manual (Page 23)

Table 4-2. Register Summary
Configure 8255 None - No read back on 8255 BASE + 19
Port C Output Port C Input BASE + 18
Port B Output Port B Input BASE + 17
Port A Output Port A Input of 8255 BASE + 16
Pacer Clock Control (8254) None. No read back on 8254 BASE + 15
CTR 2 Data - A/D Pacer CTR 2 Data - A/D Pacer Clock BASE + 14
CTR 1 Data - A/D Pacer CTR 1 Data - A/D Pacer Clock BASE + 13
Counter 0 Data Counter 0 Data BASE + 12
Reserved for future use. BASE + 11
None Pacer clock control register. BASE + 10
Set DMA, INT etc DMA, Interrupt & Trigger Control BASE + 9
Interrupt Reset Status EOC, UNI/BIP etc. BASE + 8
D/A 1 Bits 1(MSB) - 8 None BASE + 7
D/A 1 Bits 9-12 (LSB) None BASE + 6
D/A 0 Bits 1(MSB)-8 None BASE + 5
D/A 0 Bits 9-12 (LSB) None BASE + 4
Digital 4 Bit Output Digital 4 Bit Input BASE + 3
Channel MUX Set Channel MUX Read BASE + 2
None A/D Bits 1 (MSB) - 8 BASE + 1
Start A/D Function A/D Bits 9 - 12 (LSB) & Channel # BASE
WRITE FUNCTION READ FUNCTION ADDRESS
4.2 A/D DATA & CHANNEL REGISTERS
BASE ADDRESS
CH1 CH2 CH4 CH8 A/D12
LSB
A/D11 A/D10 A/D9
0 1 2 3 4 5 6 7
A read/write register.
READ:
On read, it contains two types of data. The least significant four digits of the analog input data and the channel number
which the current data was taken from.
These four bits of analog input data must be combined with the eight bits of analog input data in BASE + 1, forming a
complete 12-bit number. The data is in the format 0 = minus full scale. 4095 = +FS.
The channel number is binary-coded. The weights are shown in Table 4-1. For example, if the current channel were five,
then bits CH4 and CH1 would be high and CH8 and CH2 would be low.
WRITE:
Writing any data to the register causes an immediate A/D conversion.
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