Artesyn COMX-P4080 Installation and Use (August 2014) - Manual (Page 73)

Chapter 5
COMX-P4080 COM Express Module Installation and Use (6806800L20C) 73
Maps and Registers
5.1 Maps
5.1.1 Memory Map
The following table shows COMX-P4080’s memory mapping.
5.1.2 NOR Flash
The NOR flash is attached to the GPCM on local bus and works at 16-bit mode.
Table 5-1 COMX-P4080 Memory Map
Address# Effective Address Physical Address Size Description
1 0000 0000 0 0000 0000 0 8000 0000 2 GB DDR3 Memory 1
2 8000 0000 C 0000 0000 0 2000 0000 512 MB PCIE1 MEM
3 A000 0000 C 2000 0000 0 2000 0000 512 MB PCIE2 MEM
2
4 A000 0000 C 2000 0000 0 1000 0000 256 MB RIO1 MEM
1
5 B000 0000 C 3000 0000 0 1000 0000 256 MB RIO2 MEM
2
6 C000 0000 C 4000 0000 0 2000 0000 512 MB PCIE3 MEM
7 E800 0000 F E800 0000 0 800 0000 128 MB LBC NOR FLASH
8 F000 0000 F 0000 0000 0 0040 0000 4 MB DCSR
9 F400 0000 F F400 0000 0 0020 0000 2 MB BMAN MEM
10 F420 0000 F F420 0000 0 0020 0000 2 MB QMAN MEM
11 F800 0000 F F800 0000 0 0001 0000 64 KB PCIE1 IO
12 F801 0000 F F801 0000 0 0001 0000 64 KB PCIE2 IO
13 F802 0000 F F802 0000 0 0001 0000 64 KB PCIE3 IO
14 FFA0 0000 F FFA0 0000 0 0010 0000 1MB NAND FLASH Buffer
15 FE00 0000 F FE00 0000 0 0100 0000 16 MB CCSR
16 FFFF F000 0 FFFF F000 0 0000 1000 4 KB BOOT PAGE
1 A maximum of 2 GB memory is mapped in the U-Boot. Anything more than 2 GB will leave the other memory
unmapped and not used. Linux operating systems can use more than 2 GB. Up to 4 GB has been verified.
2 Address #4 and #5 is used instead of address #3 if RIO is configured.