Altera Stratix IV GX FPGA Development Board - Manual (Page 60)

2–52 Chapter 2: Board Components
Memory
Stratix IV GX FPGA Development Board, 530 Edition Reference Manual November 2010 Altera Corporation
DDR3 Top Port
The DDR3 top port consists of a single DDR3 devices, providing 128 Mbyte with a
16-bit data bus. The board supports addressing for up to 4 times the memory if larger
devices become available.
This memory interface is designed to run between 300 MHz, the minimum frequency
for DDR3, and 533 MHz for a maximum theoretical bandwidth of over 68.2 Gbps. The
internal bus in the FPGA is typically 2 or 4 times the width at full rate or half rate
respectively. For example, a 533 MHz 64-bit interface will become a 267 MHz 256-bit
bus.
Table 2–48 lists the DDR3 top port pin assignments, signal names, and its functions.
The signal names and types are relative to the Stratix IV device in terms of I/O setting
and direction.
Table 2–48. DDR3 Top Port Pin Assignments, Signal Names and Functions (Part 1 of 2)
Board Reference Description Schematic Signal
Name
I/O Standard
Stratix IV GX
Device
Pin Number
U14.T7 Address bus DDR3TOP_A14
1.5-V SSTL Class I
B20
U14.T3 Address bus DDR3TOP_A13 M22
U14.N7 Address bus DDR3TOP_A12 A23
U14.R7 Address bus DDR3TOP_A11 A19
U14.L7 Address bus DDR3TOP_A10 B23
U14.R3 Address bus DDR3TOP_A9 M21
U14.T8 Address bus DDR3TOP_A8 F21
U14.R2 Address bus DDR3TOP_A7 M20
U14.R8 Address bus DDR3TOP_A6 G21
U14.P2 Address bus DDR3TOP_A5 P19
U14.P8 Address bus DDR3TOP_A4 D21
U14.N2 Address bus DDR3TOP_A3 R20
U14.P3 Address bus DDR3TOP_A2 N19
U14.P7 Address bus DDR3TOP_A1 C22
U14.N3 Address bus DDR3TOP_A0 D19
U14.M3 Bank address bus DDR3TOP_BA2 A14
U14.N8 Bank address bus DDR3TOP_BA1 E23
U14.M2 Bank address bus DDR3TOP_BA0 B14
U14.J3 Row address select DDR3TOP_RASn A24
U14.K3 Column address select DDR3TOP_CASn B19
U14.L2 Chip select DDR3TOP_CSn D15
U14.L3 Write enable DDR3TOP_WEn C19
U14.K1 Termination enable DDR3TOP_ODT K15
U14.K9 Clock enable DDR3TOP_CKE A25
U14.J7 Clock P DDR3TOP_CK_P D24
U14.K7 Clock N DDR3TOP_CK_N C24