Overview, Introduction, General description – Altera Arria II GX FPGA Development Board User Manual
Page 5: Chapter 1. overview, Introduction –1 general description –1
February 2011
Altera Corporation
Arria II GX FPGA Development Board Reference Manual
1. Overview
Introduction
This document describes the hardware features of the Arria
®
II GX FPGA
development board, including the detailed pin-out and component reference
information required to create custom FPGA designs that interface with all
components of the board.
General Description
The Arria II GX FPGA development board provides a hardware platform for
developing and prototyping low-power, high-performance, and logic-intensive
designs. The board provides a wide range of peripherals and memory interfaces to
facilitate the development of the Arria II GX FPGA designs.
Two high-speed mezzanine card (HSMC) ports are available to add additional
functionality via a variety of HSMCs available from Altera
®
and various partners.
f
To see a list of the latest HSMCs available or to download a copy of the HSMC
specification, refer to the
page of the Altera
website.
Design advancements and innovations, such as the 3.75-Gbps transceiver modules,
the PCI Express hard IP implementation, and programmable power technology
ensure that designs implemented in the Arria II GX FPGAs operate faster, with lower
power, and have a faster time to market than previous FPGA families.
f
For more information on the following topics, refer to the respective documents:
■
Arria II device family, refer to the
.
■
PCI Express MegaCore function, refer to the
.
■
HSMC Specification, refer to the
.