Altera Arria II GX FPGA Development Board - Manual (Page 45)

Chapter 2: Board Components 2–37
Components and Interfaces
February 2011 Altera Corporation Arria II GX FPGA Development Board Reference Manual
J1.44 Dedicated CMOS I/O bit 3 HSMB_D3
2.5-V
AJ30
J1.47 Dedicated CMOS I/O bit 4 HSMB_D4 AF28
J1.48 Dedicated CMOS I/O bit 5 HSMB_D5 AJ29
J1.49 Dedicated CMOS I/O bit 6 HSMB_D6 AL28
J1.50 Dedicated CMOS I/O bit 7 HSMB_D7 AE28
J1.53 Dedicated CMOS I/O bit 8 HSMB_D8 AK28
J1.54 Dedicated CMOS I/O bit 9 HSMB_D9 AH28
J1.55 Dedicated CMOS I/O bit 10 HSMB_D10 AJ28
J1.56 Dedicated CMOS I/O bit 11 HSMB_D11 AH27
J1.59 Dedicated CMOS I/O bit 12 HSMB_D12 AJ26
J1.60 Dedicated CMOS I/O bit 13 HSMB_D13
LVDS or 2.5-V
AG27
J1.61 Dedicated CMOS I/O bit 14 HSMB_D14 AH26
J1.62 Dedicated CMOS I/O bit 15 HSMB_D15 AF27
J1.65 Dedicated CMOS I/O bit 16 HSMB_D16 AG24
J1.66 Dedicated CMOS I/O bit 17 HSMB_D17 AF24
J1.67 Dedicated CMOS I/O bit 18 HSMB_D18 AF25
J1.68 Dedicated CMOS I/O bit 19 HSMB_D19 AE23
J1.71 Dedicated CMOS I/O bit 20 HSMB_D20 AE27
J1.72 Dedicated CMOS I/O bit 21 HSMB_D21 AE21
J1.73 Dedicated CMOS I/O bit 22 HSMB_D22 AE26
J1.74 Dedicated CMOS I/O bit 23 HSMB_D23 AD21
J1.77 Dedicated CMOS I/O bit 24 HSMB_D24 AD22
J1.78 Dedicated CMOS I/O bit 25 HSMB_D25 AC22
J1.79 Dedicated CMOS I/O bit 26 HSMB_D26 AG4
J1.80 Dedicated CMOS I/O bit 27 HSMB_D27 AH5
J1.83 Dedicated CMOS I/O bit 28 HSMB_D28 AF6
J1.84 Dedicated CMOS I/O bit 29 HSMB_D29 AF5
J1.85 Dedicated CMOS I/O bit 30 HSMB_D30 AH7
J1.86 Dedicated CMOS I/O bit 31 HSMB_D31 AG6
J1.89 Dedicated CMOS I/O bit 32 HSMB_D32 AG7
J1.90 Dedicated CMOS I/O bit 33 HSMB_D33 AF7
J1.91 Dedicated CMOS I/O bit 34 HSMB_D34 AE7
J1.92 Dedicated CMOS I/O bit 35 HSMB_D35 AE8
J1.95 Dedicated CMOS I/O bit 36 HSMB_D36 AF8
J1.96 Dedicated CMOS I/O bit 37 HSMB_D37 AD10
J1.97 Dedicated CMOS I/O bit 38 HSMB_D38 AD9
J1.98 Dedicated CMOS I/O bit 39 HSMB_D39 AJ6
J1.101 Dedicated CMOS I/O bit 40 HSMB_D40 AK4
Table 2–38. HSMC Port B Pin Assignments, Schematic Signal Names, and Functions (Part 2 of 4)
Board
Reference
Description Schematic Signal
Name
I/O Standard
Arria II GX
Device
Pin Number