Altera Designing With Low-Level Primitives - Manual (Page 25)

Altera Corporation 2–3
April 2007 Designing with Low-Level Primitives User Guide
Primitive Reference
Example 2–2 shows a VHDL component declaration for an ALT_INBUF
primitive instantiation.
Example 2–2. ALT_INBUF Primitive Component Declaration, VHDL
COMPONENT ALT_INBUF
GENERIC
(IO_STANDARD : STRING :="NONE";
WEAK_PULL_UP_RESISTOR : STRING :="NONE";
LOCATION : STRING :="NONE";
ENABLE_BUS_HOLD : STRING :="NONE";
WEAK_PULL_UP_RESISTOR : STRING :="NONE";
TERMINATION : STRING :="NONE");
PORT (i : IN STD_LOGIC;
o : OUT STD_LOGIC);
END COMPONENT;
ALT_OUTBUF
The primitive allows you to make a location assignment,
io_standard assignment, current_strength assignments,
termination assignment, and also lets you determine whether to use weak
pull-up resistor, whether to enable bus-hold circuitry and/or a
slow_slew_rate assignment to an output pin from a lower-level entity.
Table 2–2 explains the ALT_OUTBUF input and output ports, and the
parameter options. If any other parameter is specified, an error will
result.