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The hsmc tab – Altera Audio Video Development Kit, Stratix IV GX Edition User Manual

Page 35

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Chapter 6: Board Test System

6–13

Using the Board Test System

© November 2009 Altera Corporation

Audio Video Development Kit, Stratix IV GX Edition User Guide

Write (MBps)

and Read (MBps)—Show the number of bytes of data analyzed per

second.

Error Control

The Error control controls track transaction errors detected during analysis:

Detected errors

—Displays the number of transaction errors detected in the

hardware.

Inserted errors

—Displays the number of errors inserted into the transaction

stream.

Insert Error

—Inserts a one-word error into the transaction stream each time you

click the button. Insert Error is only enabled during transaction performance
analysis.

Clear

—Resets the Detected Errors and Inserted Errors counters to zeros.

Number of Addresses to Write and Read

The Number of addresses to write and read control determines the number of
addresses to use in each iteration of reads and writes. Valid values range from 2 to
524,288.

Data Type

The Data type control specifies the type of data contained in the transactions. The
following data types are available for analysis:

PRBS

—Selects pseudo-random bit sequences.

Memory

—Selects a generic data pattern stored in the on chip memory of the

Stratix IV GX device.

Math

—Selects data generated from a simple math function within the FPGA

fabric.

The HSMC Tab

The HSMC tab allows you to perform loopback tests on the HSMC A and HSMC B
ports.

Figure 6–7

shows the HSMC tab.