Altera Audio Video Development Kit, Stratix IV GX Edition - Manual (Page 26)

6–4 Chapter 6: Board Test System
Using the Board Test System
Audio Video Development Kit, Stratix IV GX Edition User Guide © November 2009 Altera Corporation
The Configure Menu
Each test design tests different functionality and corresponds to one or more
application tabs. Use the Configure menu to select the design you want to use.
Figure 6–2 shows the Configure menu.
To configure the FPGA with a test system design, perform the following steps:
1. On the Configure menu, click the configure command that corresponds to the
functionality you wish to test.
2. In the dialog box that appears, click Download Start to download the
corresponding design’s SRAM Object File (.sof) to the FPGA. The download
process usually takes about a minute.
3. When configuration finishes, close the Quartus II ProgrammerThe design begins
running in the FPGA. The corresponding GUI application tab that interfaces with
the design in the FPGA comes to the front.
The Config Tab
The Config tab shows information about the board’s current configuration.
Figure 6–1 on page 6–2 shows the Config tab. The tab displays the contents of the
MAX II registers, the MAX II code version, the JTAG chain, the board’s MAC address,
and the flash memory map.
The following sections describe the controls on the Config tab.
MAX II Registers
The MAX II registers control allow you to view and change the current MAX II
register values as described in
Table 6–1 . Changes to the register values with the GUI
take effect immediately. For example, writing a 0 to SRST resets the board.
Figure 6–2. The Configure Menu