Altera ASI MegaCore Function User Manual
Page 11
2–2
Chapter 2: Getting Started
Design Flow
Asynchronous Serial Interface (ASI) MegaCore Function User Guide
January 2014
Altera Corporation
1
The ASI MegaCore function is in the Interface > ASI directory.
3. Specify the parameters on all pages in the Parameter Settings tab.
f
For detailed explanation of the parameters, refer to the
.
4. On the EDA tab, turn on Generate simulation model to generate an IP functional
simulation model for the MegaCore function.
An IP functional simulation model is a cycle-accurate VHDL or Verilog HDL
model produced by the Quartus II software.
c
Use the simulation models only for simulation and not for synthesis or any
other purposes. Using these models for synthesis creates a nonfunctional
design.
1
Some third-party synthesis tools can use a netlist that contains only the
structure of the MegaCore function, but not detailed logic, to optimize
performance of the design that contains the MegaCore function. If your
synthesis tool supports this feature, turn on Generate netlist.
5. On the Summary tab, select the files you want to generate. A gray checkmark
indicates a file that is automatically generated. All other files are optional.
f
For more information about the files generated in your project directory,
refer to
Table 2–1
.
6. Click Finish to generate the MegaCore function and supporting files.
7. If you generate the MegaCore function instance in a Quartus II project, you are
prompted to add the .qip files to the current Quartus II project.
1
The .qip file is generated by the MegaWizard interface, and contains
information about the generated IP core. In most cases, the .qip file contains
all of the necessary assignments and information required to process the
MegaCore function or system in the Quartus II compiler. The MegaWizard
interface generates a single .qip file for each MegaCore function.
8. After you review the generation report, click Exit to close the MegaWizard Plug-In
Manager.