ADLINK PCIe-7350 - Manual (Page 46)

36 Function Block and Operation Theory
The operation architecture of DI DMA in continuous mode is
shown as below:
Figure 3-10: DI Continuous Mode Architecture
1/N
DI
C
LK
Mu
x
Int. DI sampled clk
16 steps
phase shift
Ext. DI sampled clk
E
xt.
D
I CL
K
Mu
x
Bus Master DMA
100MHz
8K FIFO Flip Flop
D[31:0]
I
AFI7
SMB CLK in
AFI[7:0]
DI sampled clk
Start Trigger
Mux
NoWait/
WaitTRIG
Software trigger DI-Start
PCIe-7350 Card
DI Data DI Data
External trigger in
External clock in
clk
enable
Software trigger out