Digilent 410-292P-KIT - Manual (Page 18)

Nexys4 DDR™ FPGA Board Reference Manual
Copyright Digilent, Inc. All rights reserved.
Other product and company names mentioned may be trademarks of their respective owners.
Page 18 of 29
Artix-7
M18
M17
P17
M13
R15
R17
T18
U18
P18
R13
BTNL
BTNR
BTNU
BTND
SW0
SW1
SW2
SW3
SW4
SW5
SW6
SW7
3.3V
LD0
LD1
LD2
LD3
LD4
LD5
LD6
LD7
LEDs
AN3
AN2
AN1
AN0
L16
J15
H17
K15
J13
N14
R18
V17
U17
U16
J14
T9
J18
J17
T10
R10
K16
K13
P15
T11
L18
CA
CB
CC
CD
CE
CF
CG
DP
H15
7-seg
Display
Slide
Switches
3.3V
Buttons
N17
BTNC
R16
T13
H6
U12
U11
V10
SW8
SW9
SW10
SW11
SW14
SW12
SW13
SW15
U8
T8
LD8
LD9
LD10
LD11
LD12
LD13
LD14
LD15
V16
T15
U14
T16
V15
V14
V12
V11
3.3V
AN7
AN6
AN5
AN4
5.0V
R17
G17
B17
R16
G16
B16
LD17 LD16
BTNRES
3.3V
CPU Reset C12
U13
K2
T14
P14
N16
R11
G14
N15
M16
R12
Tri-Color
LEDs
1.8V
Figure 16. General Purpose I/O devices on the Nexys4 DDR.