Rockwell Automation 1746-FIO4V SLC 500 Fast Analog I/O/ User Manual - Manual (Page 48)

Publication 1746-UM009B-EN-P - September 2007
48 Write Ladder Logic
Ladder Logic
The out-of-range limits are predetermined because any value less than
0% is 6242 and any value greater than 100% is 31,208. The ladder logic
checks for out-of-range limits to verify that not less than 4 mA and not
more than 20 mA is delivered to the analog output channel.
The following ladder logic uses standard math. It unlatches the
mathematical overflow bit S2:5/0 before the end of the scan to
prevent a processor fault.
Example Program for Any SLC Processor
] [
GREATER THAN
Source A
Source B
N7:0
100
Rung 2:0
Set in-range bit
Rung 2:1
Check for below range
Rung 2:2
Check for above range
Rung 2:4
Multiply by the
scaled range
Clear fault bit
from overflow
Divide result
by input range
Add offset
B3/0
(U)
S2:5/0
(U)
LES
GRT
MUL
DDV
ADD
END
LESS THAN
Source A
Source B
N7:0
0
MULTIPLY
Source A
Source B
Dest
N7:0
24966
N7:1
DOUBLE DIVIDE
Source A
Dest
100
N7:1
ADD
Source A
Source B
Dest
N7:1
6242
0:2.0
B3/0
(L)
MOV
MOVE
Source A
Dest 6242
0:2.0
B3/0
B3/0
(U)
MOV
MOVE
Source A
Dest 31208
0:2.0
Rung 2:3
Scale the analog input
N7:0 contains
% valve open