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Figure 4. i·c mode timing, Figure 4. i²c mode timing – Cirrus Logic CS8415A User Manual

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DS470F4

CS8415A

SWITCHING CHARACTERISTICS - CONTROL PORT - I²C MODE

(Note 15)

, Inputs: Logic 0 = 0 V, Logic 1 = VL+; C

L

= 20 pF.

15. I²C protocol is supported only in VL+ = 5.0 V mode.

16. Data must be held for sufficient time to bridge the 25 ns transition time of SCL.

Parameter

Symbol Min Typ

Max

Units

SCL Clock Frequency

fscl

-

-

100

kHz

Bus Free Time Between Transmissions

t

buf

4.7

-

-

µs

Start Condition Hold Time (prior to first clock pulse)

t

hdst

4.0

-

-

µs

Clock Low Time

t

low

4.7

-

-

µs

Clock High Time

t

high

4.0

-

-

µs

Setup Time for Repeated Start Condition

t

sust

4.7

-

-

µs

SDA Hold Time from SCL Falling

(Note 16)

t

hdd

0

-

-

µs

SDA Setup Time to SCL Rising

t

sud

250

-

-

ns

Rise Time of Both SDA and SCL Lines

t

r

-

-

25

ns

Fall Time of Both SDA and SCL Lines

t

f

-

-

25

ns

Setup Time for Stop Condition

t

susp

4.7

-

-

µs

t

buf

t

hdst

t

hdst

t

low

t r

t f

t

hdd

t

high

t sud

t sust

t susp

Stop

Start

Start

Stop

Repeated

SDA

SCL

Figure 4. I²C Mode Timing