Cirrus Logic CS61583 - Manual (Page 35)

POWER SUPPLY
As shown on the evaluation board schematic in
Figures 1-5, power is supplied to the board from
an external +5 Volt supply connected to the two
binding posts labeled V+ and GND. Zener diode
Z1 protects the components on the board from
reversed supply connections and over-voltage
damage. Capacitor C16 provides power supply
decoupling and ferrite bead L1 isolates the
CS61583 and buffer supplies. Both sides of the
evaluation board contain extensive areas of
ground plane to insure optimum performance.
Capacitors C3, C5-C8, C13, C18, and C38
provide power supply decoupling for the
CS61583. The BGREF pin is pulled down
through resistor R10 to provide an internal
current reference. The buffers are decoupled
using capacitors C9, C15, and C19. Ferrite beads
L2-L4 help reduce the power supply noise that is
coupled from the buffers to the power supply.
BOARD CONFIGURATION
The evaluation board is based on the CDB61584
used to evaluate the CS61584 dual LIU
optimized for Host mode applications. Because
the CS61583 is optimized for Hardware mode
applications, slide switch SW6 must be placed in
the "HW" position to set the AGND1 pin of the
CS61583 to a logic 0. In addition, the host
processor interface appearing at J26 is not used
on the CDB61583.
The evaluation board is configured using DIP
switches SW2, SW3, and SW4. Because the
evaluation board is based on the CDB61584
design, switches SW2, SW3, and SW4 are
relabeled with white stickers. These switches
establish the digital control inputs for both line
interface channels. Closing a DIP switch towards
the label sets the CS61583 control pin of the
same name to a logic 1. All switch inputs are
pulled-down using resistor networks RP2-RP5.
The CDB61583 switch functions are listed
below:
•
TAOS1, TAOS2: transmit all ones;
•
LLOOP1, LLOOP2: local loopback;
•
RLOOP1, RLOOP2: remote loopback;
•
CODER1, CODER2: encoder/decoder control;
•
ATTEN0, ATTEN1: jitter attenuator selection;
•
CLKE: RCLK edge polarity;
•
1XCLK: clock frequency selection;
•
AMI1, AMI2: encoder/decoder control;
•
CONx1, CONx2: line configuration settings.
A jumper must be installed on header J10 to
enable RLOOP2 functionality.
Alarm Indications
The LOS1 and LOS2 LED indicators illuminate
when the line interface receiver has detected a
loss of signal. Headers J7 and J13 must be
jumpered in the "TNEG" position to provide
connectivity to the BNC input when the coder
mode is disabled (CODER(1,2) = 0).
The AIS alarm condition is provided when the
coder mode is enabled (CODER(1,2) = 1) and
headers J7 and J13 are jumpered in the "AIS"
position. The AIS1 and AIS2 LED indicators
illuminate when the line interface receiver has
detected the all-ones receive input signal.
Resistors R26 and R27 pull-down the
TNEG(1,2) inputs when coder mode is disabled
but headers J7 and J13 are jumpered in the
"AIS" position.
Manual Reset
A momentary contact switch SW1 provides a
manual reset by forcing the RESET pin of the
CS61583 to a logic 1. Although the transmit and
receive circuitry are continuously calibrated, the
CDB61583
DB172PP1 35