Cirrus Logic CS61583 User Manual
Page 20
The test data register selected by the current in-
struction retains its previous value during this
state. The instruction does not change in this
state.
When the controller is in this state and a rising
edge is applied to J-TCK, the controller enters
the Exit1-IR state if J-TMS is held high, or re-
mains in the Shift-IR state if J-TMS is held low.
Exit1-IR State
This is a temporary state. While in this state, if
J-TMS is held high, a rising edge applied to J-
TCK causes the controller to enter the Update-IR
state, which terminates the scanning process. If
J-TMS is held low and a rising edge is applied
to J-TCK, the controller enters the Pause-IR
state.
The test data register selected by the current in-
struction retains its previous value during this state.
The instruction does not change in this state.
Pause-IR State
The pause state allows the test controller to tem-
porarily halt the shifting of data through the
instruction register.
The test data register selected by the current in-
struction retains its previous value during this
state. The instruction does not change in this
state.
The controller remains in this state as long as
J-TMS is low. When J-TMS goes high and a
rising edge is applied to J-TCK, the controller
moves to the Exit2-IR state.
Exit2-IR State
This is a temporary state. While in this state, if
J-TMS is held high, a rising edge applied to J-
TCK causes the controller to enter the Update-IR
state, which terminates the scanning process. If
J-TMS is held low and a rising edge is applied
to J-TCK, the controller enters the Shift-IR state.
The test data register selected by the current in-
struction retains its previous value during this
state. The instruction does not change in this
state.
Update-IR State
The instruction shifted into the instruction regis-
ter is latched into the parallel output from the
shift-register path on the falling edge of J-TCK.
When the new instruction has been latched, it
becomes the current instruction.
Test data registers selected by the current in-
struction retain their previous value.
JTAG Application Examples
Figures 13 and 14 illustrate examples of updat-
ing the instruction and data registers during
JTAG operation.
CS61583
20
DS172PP5