Cirrus Logic CS470xx - Manual (Page 27)

27 DS787PP9
8 Device Pinout Diagrams
8 Device Pinout Diagrams
8.1 CS47048, 100-pin LQFP Pinout Diagram
Figure 8-1. CS47048 Pinout Diagram
VDD1
GND2
VDDIO1
GNDIO1
VDD2
GND1
GPIO1, DAI_DATA2, TM2
GPIO2, DAI_DATA3, TM3, SPDIF RX
GPIO16, DAI_DATA0, TM0
GPIO0, DAI_DATA1, TM1
10
15
20
25
GPIO5, DAO_DATA3, HS3, S/PDIF TXa
GPIO3, DAO_DATA1, HS1
GPIO6, DAO_DATA0, HS0
GPIO7, DAO_LRCLK
GPIO15, DAI_LRCLK
GPIO18, DAO_MCLK, HS4
GPIO17, DAI_SCLK
GPIO14, DAO_SCLK
GPIO4, DAO_DATA2, HS2, S/PDIF TXb
VDDIO2
GNDIO2
DBDA
DBCK
CS47048
100-Pin LQFP
(Thermal Pad Package )
5
1
GPIO10, SCP_MISO, SCP_SDA
GPIO9, SCP_MOSI
G
P
IO
8,
S
C
P
_CS
, D
A
I_
DA
T
A
4
G
P
IO
12,
S
C
P
_IR
Q
G
P
IO
13
, SC
P
_BS
Y,
EE_
C
S
GN
D
IO
3
GN
D
_S
U
B
X
TAL
_O
U
T
, T
EST
G
ND3
XT
I
XT
O
G
N
D
A
_P
LL
P
LL_R
E
F_R
E
S
A
IN
_6B
-
AI
N
_6
B
+
A
IN
_5B
-
AI
N
_5
B
+
26
G
P
IO
11, S
C
P
_C
LK
30
VD
D
IO
3
35
V
DD3
40
V
D
D
A
_P
LL
45
A
IN
_4B
-
A
IN
_4B
+
A
IN
_3B
-
AI
N
_3
B
+
A
IN
_2B
-
50
AI
N
_2
B
+
70
65
60
55
51
75
AIN_1B-
AIN_5A-
VQ
BIASREF_DAC
AIN_5A+
VDDA3
AIN_1A-
AIN_1B+
GNDA3
AIN_1A+
AIN_4A-
AIN_3A-
AIN_3A+
BIASREF_ADC
VDD_ADC_MON
AIN_2A-
REXT
VDDA2
AIN_4A+
AIN_2A+
GNDA2
GND_DAC
VDD_DAC
AIN_6A-
AIN_6A+
95 90 85 100 80 76
A
O
U
T_1+
A
O
U
T_1-
VD
D
A
7
A
O
U
T_2+
A
O
U
T_2-
A
O
U
T_3+
A
O
U
T_3-
GN
D
A
6
A
O
U
T_4+
A
O
U
T_4-
A
O
U
T_5+
VD
D
A
5
GN
D
A
5
A
O
U
T_6+
A
O
U
T_6-
R
E
SET
GN
D
A
7
VD
D
A
6
A
O
U
T_5-
A
O
U
T_7+
A
O
U
T_7-
VD
D
A
4
GN
D
A
4
A
O
U
T_8+
A
O
U
T_8-