Cirrus Logic CS470xx - Manual (Page 11)

11 DS787PP9
4.4 DSP I/O Description
4.3.8 Serial Control Port (I 2 C or SPI)
The on-chip serial control port is capable of operating as master or slave in either SPI or I2C modes. Master/Slave
operation is chosen by mode select pins when the CS470xx comes out of reset. The serial clock pin can support
frequencies as high as 25 MHz in SPI mode (SPI clock speed must always be < (DSP Core Frequency/2)). The CS470xx
serial control port also includes a pin for flow control of the communications interface (SCP_BSY) and a pin to indicate
when the DSP has a message for the host (SCP_IRQ).
4.3.9 GPIO
Many of the CS470xx peripheral pins are multiplexed with GPIO. Each GPIO can be configured as an output, an input, or
an input with interrupt. Each input-pin interrupt can be configured as rising edge, falling edge, active-low, or active-high.
4.3.10 PLL-based Clock Generator
The low-jitter PLL generates integer or fractional multiples of a reference frequency, which is used to clock the DSP core
and peripherals. Through a second PLL divider chain, a dependent clock domain can be output on the DAO port for driving
audio converters. The CS470xx defaults to running from the external reference frequency and is switched to use the PLL
output after overlays have been loaded and configured, either through master boot from an external flash or through host
control. A built-in crystal oscillator circuit with a buffered output is provided. The buffered output frequency ratio is
selectable between 1:1 (default) or 2:1.
4.3.11 Hardware Watchdog Timer
The CS470xx has an integrated watchdog timer that acts as a “health” monitor for the DSP. The watchdog timer must be
reset by the DSP before the counter expires, or the entire chip is reset. This peripheral ensures that the CS470xx resets
itself in the event of a temporary system failure. In stand-alone mode (where there is no host MCU), the DSP reboots from
external flash. In slave mode (where the host MCU is present), a GPIO is used to signal the host that the watchdog has
expired and the DSP should be rebooted and re-configured.
4.4 DSP I/O Description
4.4.1 Multiplexed Pins
Many of the CS470xx pins are multifunctional. For details on pin functionality, see Section 10.5, “Pin Assignments”, in the
CS470xx Hardware User’s Manual
.
4.4.2 Termination Requirements
Open-drain pins on the CS470xx must be pulled high for proper operation. See the CS470xx Hardware User’s Manual to
identify which pins are open-drain and what value of pull-up resistor is required for proper operation.
Mode select pins on CS470xx are used to select the boot mode on the rising edge from reset. A detailed explanation of
termination requirements for each communication mode select pin can be found in the CS470xx Hardware User’s Manual.
4.4.3 Pads
The CS470xx Digital I/Os operate from the 3.3 V supply and are 5 V tolerant.
4.5 Application Code Security
The external program code can be encrypted by the programmer to protect any intellectual property it contains. A secret,
customer-specific key is used to encrypt the program code that is to be stored external to the device. Contact your local
Cirrus representative for details.