GW Instek PST series Programming Manual - Manual (Page 22)

PST & PSS & PSH SERIES PROGRAMMABLE POWER SUPPLY
PROGRAMMER MANUAL
⎯ 41 ⎯
Table 4: QUEStionable Status Register
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
∗
NU NU NU NU NU Summary
OVP
NU
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
NU NU NU NU NU NU
Summar
y Current
Summary
Voltage
The command STATus:QUEStionable:CONDtion? Reads the
QUEStionable CONDition register but dose not clear it.
The command STATus:QUEStionable:EVENt? Reads the
QUEStionable EVENt Status register and clears it.
OPERation Status Registers
Table 5 shows the bit designations of the 16 bit OPERation Status
Register.
Table 5: OPERation Status Register
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
NU NU NU NU NU NU NU
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
NU NU NU NU NU NU NU NU
∗
NU: not used
PST & PSS & PSH SERIES PROGRAMMABLE POWER SUPPLY
PROGRAMMER MANUAL
⎯ 42 ⎯
Status Registers
There are two status registers are included to the power supply defined by
IEEE-488.1 and IEEE-488.2 standards.
z Status Byte Register (SBR)
z Standard Event Status Register (SESR)
Status Byte Register (SBR): The SBR (Table 6) summarizes the status of
all other registers and queues.
Table 6: Status Byte Register (SBR)
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
OPER RQS/MSS ESB MAV QUES E/E NU NU
The bit 0 and 1 are not used, so these bits are always zero. The bit 2
(Error and Event) indicates an error code is waiting to be read in the
Error Event Queue. The bit 3 (QUES, QUEStionable) is the summary bit
for the QESR (QUEStionable Event Status Register). When the bit is
high it indicates that status is enabled and present in the QUES. The bit 4
(MAV, Message Available) indicates that output is available in the
output queue. The bit 5 (ESB, Event Status Bit) is the summary bit for
the Standard Event Status Register (SESR). When the bit is high it
indicates that status is enabled and present in the SESR. The bit 6 (RQS,
Request Service) is obtained from a serial poll and shows that the power
supply requests service from the GPIB controller. The bit 7 (OPER,
OPERation) is the summary bit for the OESR (OPERation EVENt
STATus Register).