Rainbow Electronics BR24L02FVM-W User Manual

Page 19

BR24L02-W / BR24L02F-W / BR24L02FJ-W /

Memory ICs

BR24L02FV-W / BR24L02FVM-W

19/25

•

The minimum value R

The minimum value of R

is determined by following factors.

① Meet the condition that V

OLMAX

=0.4V, I

OLMAX

=3mA when the device output low on SDA line.

≥

−

≤

−

② V

OLMAX

(=0.4V) must be lower than the input LOW level of the controller and the EEPROM including

recommended noise margin (0.1 V

OLMAX

≤

−

0.1V

≥

−

0.4

−

≥

867 [

Ω

]

Examples : V

3V, V

0.4V, I

3mA, the V

of the controller and the EEPROM is V

0.3V

According to

and

so that condition is met

0.4[V]

0.3

0.9[V]

•

Pull up resister of SCL pin

In the case that SCL is controlled by CMOS output, the pull up resister of SCL is not needed.
But in the case that there is a timing at which SCL is Hi-Z, connect SCL to V

with pull up resister.

Several

∼

several dozen k

Ω

is recommended as a pull up resister, which is considered with the driving ability of the

output port of the controller.

7) Connections of A0, A1, A2, WP pin

•

Connections of device address pin (A0, A1, A2)

The state of device address PIN are compared with the device address send by the master, then one of the devices
which are connected to the identical bus is selected. Pull up or down these pins, or connect them to V

or GND.

Pins which is not used as device address (N.C. PIN) may be either HIGH, LOW, and Hi-Z.

The type of the device which have N.C. PIN BR24L16 / F / FJ / FV / FVM-W A0, A1, A2

BR24L08 / F / FJ / FV / FVM-W A0, A1

BR24L04 / F / FJ / FV / FVM-W A0

•

Connections of WP pin

The WP input allows or inhibits write operations. When WP is HIGH, only READ is available and WRITE to any
address is inhibited. Both Read and Write are available when WP is LOW.
In the case that the device is used as a ROM, it is recommended that WP is pulled up or connected to V

In the case that both READ and WRITE are operated, WP pin must be pulled down or connected to GND or
controlled.