Rainbow Electronics AT45DQ321 - Manual (Page 37)

37 AT45DQ321 [ADVANCE DATASHEET]
DS-45DQ321-031–DFLASH–12/2012
9.6.2 Quad Disable Command
The Quad Disable command is used to program the QE bit of the non-volatile Configuration Register to a Logical 0 to
disable the Quad I/O functionality of the device. To issue the Quad Disable command, the CS pin must first be asserted
followed by a four byte opcode of 3Dh, 2Ah, 81h and 67h.
After the last bit of the four byte opcode has been clocked in, the CS pin must be deasserted allowing the QE bit of the
Configuration Register to be modified within the time of t
WRCR
.
Table 9-4. Quad Disable Command
Figure 9-4. Quad Disable
Command Byte 1 Byte 2 Byte 3 Byte 4
Quad Disable 3Dh 2Ah 81h 67h
3Dh 2Ah 81h 67h
CS
SI
Each transition represents eight bits