Rainbow Electronics AT88RF1354 - Manual (Page 10)

10
13.56 MHz Type B RF Reader
8547A −RFID−10/08
6.1. Power and Ground Pin Descriptions
6.1.1. V
CC
[24]
Supply Voltage for I/O buffers, digital, and analog circuits. V
CC
voltage must match the microcontroller I/O voltage
since all digital I/O levels are referenced to V
CC
Two V
CC
bypass capacitors must be connected between the V
CC
pin and V
SS
. A 15 nF capacitor with SRF of 32 MHz
must be placed within 3 mm of the package. A 2.2 uF capacitor should also be placed within 3 cm of the package.
Ceramic capacitors with X5R or X7R dielectric and a working voltage of 10 volts minimum should be used.
6.1.2. V
SS
[22]
Digital ground. Ground for I/O buffers and digital circuits. For maximum performance the digital ground plane must be
separated from the analog ground plane (V
SS
A) and the antenna ground plane (V
SS
_ANT) by a minimum of 20 mils.
6.1.3. V
SS
A [23]
Analog ground. Ground for analog circuits. For maximum performance the V
SS
A ground plane should connect to the
V
SS
ground plane at only a single point within 1 cm of pins 22 and 23. V
SS
A should not be connected directly to
V
SS
_ANT.
6.1.4. V
CC
_ANT [1]
Antenna supply voltage. Powers the transmitter and antenna drive circuits.
Two V
CC
_ANT bypass capacitors must be connected between the V
CC
_ANT pin and V
SS
_ANT. A 15 nF capacitor with
SRF of 32 MHz must be placed within 3 mm of the package and a 2.2 uF capacitor must be placed within 5 mm
of the package. Ceramic capacitors with X5R or X7R dielectric and a working voltage of 10 volts minimum should be
used.
6.1.5. V
SS
_ANT [2]
Antenna ground. High current return path for transmitter and antenna drive circuit current. For maximum performance
the V
SS
_ANT ground plane should connect to V
SS
at only a single point near the power filters at the edge of the reader
circuit block.
6.1.6. QFN Package Thermal Pad [ePad]
Ground for the die substrate. Must be connected directly to the V
SS
digital ground plane with multiple vias. The
package thermal pad must be soldered to a thermal pad on the board as described in Appendix D to dissipate heat
generated in the die.
Warning: If V
SS
, V
SS
A, V
SS
_ANT, and ePad are tied to a single monolithic ground plane, then transmitter noise will be
injected into the receiver circuit. Likewise, if V
CC
and V
CC
_ANT are tied to one monolithic power plane,
then transmitter noise will be injected into the receiver circuit. These PCB configurations will significantly
reduce the communication performance of the reader (reducing the communication distance).