Rainbow Electronics MAX6963 User Manual
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Connecting Multiple MAX6960s to
the 4-Wire Bus
Up to 256 MAX6960s can be interconnected to share
the same 4-wire bus in parallel, sharing a common
CS.
The maximum of 256 devices is set by the automatic
address allocation limit. Care is needed to achieve the
successful parallel interconnection of more than 16
MAX6960s due to the high-capacitive loading this pre-
sents onto the 4-wire bus. It is generally necessary to
either buffer and drive the CLK, DIN, and
CS lines to
small groups of drivers, or to reduce the 4-wire data
rate from the 20Mb/s limit, if more than approximately
16 MAX6960s are used. The exact limit depends on the
application’s 4-wire data rate requirement, the capaci-
tive drive capability of the host’s CLK, DIN, and
CS dri-
vers, and the effective capacitance of the CLK, DIN,
and
CS routing on the circuit board. The circuit in
Figure 15 shows one way of fanning out the CLK, DIN,
and
CS lines to 128 MAX6960s, and fanning in the
DOUT lines back into one DOUT line. The CLK, DIN,
and
CS lines are buffered with standard CMOS bus
buffers, with each buffer output driving 16 CLK, DIN, or
CS inputs. The tri-state DOUT outputs are also connect-
ed together in groups of 16, and fed into octal analog
multiplexers. The analog multiplexers are used here as
data selectors, with the very low (10
Ω) switch resis-
tance providing an effective logic power driver. Note,
however, that while the MAX6960’s DOUT output is tri-
state, the selected DOUT from this power driver is not.
Using the MAX6960 as Controller for
Higher Voltage or Higher Current
The MAX6960 can be used as a graphic controller with
external drive transistors for applications requiring
higher peak segment currents and/or a higher drive
voltage (multiple LEDs in series for each pixel). The
panel and pixel-level intensity control is still available
because PWM techniques are used, but the peak seg-
ment current is set by external current-limiting resistors
in series with the LEDs, instead of the MAX6960’s inter-
nal precision constant-current sources. Figure 16
shows example output drivers that interface the
MAX6960 to control anode-row displays at a higher
segment current and drive voltage. Sixteen instances of
the low-current cathode column driver, and eight
instances of the high-current anode row driver are
required per MAX6960.
To use these drivers, choose R1 to set the desired
peak segment current I
PEAK
according to the driver
supply voltage V
DRIVER
and the LED forward voltage
drop V
LED
:
I
PEAK
= (V
DRIVER
- V
LED
- V
CE(SAT)Q1
) /
(R1 + R
DS(ON)Q2
) A
Choose R2 to pass 5mA in order to drop 5V across R3
to provide 5V gate drive to logic-level pFET Q2:
R2 = (V
DRIVER
- V
CE(SAT)Q3
- 5) x 200
Ω
Rate Q1 at segment current I
PEAK
, and rate Q2 at row
current, which is 16 times I
PEAK
.
Using the MAX6960 as Driver/Controller
for RGB Displays
A MAX6960 can drive an 8 x 16 LED matrix, and so one
MAX6960 can drive two 8 x 8 monocolor digits or one 8
x 8 RGY digit. A MAX6960 cannot directly drive an 8 x
8 RGB display digit, but MAX6960s can nevertheless
be used to build RGB panels.
The MAX6960 drivers provide 3 x 2 = 6 bits of color
control to an RGB panel, or 64 colors.
The best way to drive RGB LEDs with the MAX6960 is to
use three 3-wire buses, one for each color (Figure 17). A
single 4-wire interface must be used, with three
CSs,
again one for each color. The red and green LEDs are
driven directly by their MAX6960s, and are connected
cathode row as normal. The blue LEDs cannot be driven
directly by their MAX6960s because the blue LED for-
ward voltage is too high, so external drive transistors
must be used as discussed previously. The blue LEDs
are therefore connected anode row. The MAX6960 is
suitable to drive discrete RGB matrix displays using
either separate LEDs for the red, green, and blue or six-
terminal surface-mount or through-hole RGB LEDs. The
six-terminal LEDs must be used to give individual access
to the anodes and cathodes. The MAX6960 is not suit-
able to drive prewired RGB 8 x 8 matrix displays
because the row/column wiring is incorrect.
Synchronization is achieved by writing the global panel
configuration registers for every driver at the same
time. The user must therefore provide a method for dri-
ving all three
CSs together when writing the global
panel configuration register. This complexity aside, the
three-bus method automatically organizes the display
memory into three color planes. Also, ripple sync and
mux flip can be enabled or disabled in any manner
desired. The digit limit for one set of three 3-wire buses
is 768 RGB digits using 256 MAX6960s. The structure
can be repeated to build a very large panel.
MAX6960–MAX6963
4-Wire Serially Interfaced
8 x 8 Matrix Graphic LED Drivers
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