Rainbow Electronics MAX6963 - Manual (Page 24)

MAX6960–MAX6963
255/256 digit intensity multiplied by the maximum
255/256 panel intensity. The minimum interdigit blank-
ing time is therefore 4/256 of a cycle, or 4/256 x 122µs
digit period = 1.91µs.
Peak-Segment Current Selection
The LED drive current can be selected between either
a 40mA peak per segment and a lower 20mA peak cur-
rent on a digit-by-digit basis using the R
ISET0 and
R ISET1 pins. R ISET0 should be open circuit to select
20mA, or connected to GND to select 40mA segment
current for digit 0. R
ISET1
selects segment current for
digit 1 in the same manner. The MAX6960 is guaran-
teed to drive 40mA peak segment current into a 2.4V
LED with a minimum supply voltage of 3.15V, and
20mA peak segment current into a 2.2V LED with a
minimum supply voltage of 2.7V.
Global Driver Indirect Address Register
The global driver indirect address register is used to
store the driver address identifying which of 256
MAX6960s is accessed for 16-bit transmission when a
local register is read (Table 28).
Global Display Indirect Address Register
The global display indirect address registers are used
to store the 14-bit display memory address identifying
which byte of display memory across all the intercon-
nected MAX6960s is written by an 8-bit transmission
(Table 29). The 14-bit address stored in these two reg-
isters increments after every 8-bit transmission, and
overflows from address 0x3FFF to address 0x0000.
Global Plane Counter
The global plane counter (Table 30) allows any display
plane to be selected as the current display plane, or
configures the MAX6960 for automatic plane sequenc-
ing. The display plane is switched to the newly selected
plane on the rising edge of
CS at the end of the 16-bit
transmission. When automatic plane sequencing is
selected, the current display plane is initialized to plane
P0. The current display plane is incremented through
all four planes P0–P3 (planes/intensity = 0) or both
planes P0–P1 (planes/intensity = 1) at the frame rate
selected, and then restarts at plane P0 again. The
plane sequencing continues until the global plane
counter is reconfigured. If the global plane counter is
used for the automatic sequencing of animations, the
user should ensure that the plane ahead of the current
display plane is updated before the automatic plane
switchover to achieve artifact-free animation.
4-Wire Serially Interfaced
8 x 8 Matrix Graphic LED Drivers
24 ______________________________________________________________________________________
REGISTER DATA
REGISTER
ADDRESS CODE
(HEX) D7 D6 D5 D4 D3 D2 D1 D0
Global driver indirect address 0x08 MSB 8-bit driver indirect address 0x00 to 0xFF LSB
Table 28. Global Driver Indirect Address Format
REGISTER DATA
REGISTER
ADDRESS CODE
(HEX) D7 D6 D5 D4 D3 D2 D1 D0
0x02 0 0 0 0 0 0 0 0
0x02 0 0 0 0 0 0 0 1 2/256 (min on)
0x02 0 0 0 0 0 0 1 0
3/256 0x02 0 0 0 0 0 0 1 1
4/256 0x02 0 0 0 0 0 1 0 0
5/256 0x02 0 0 0 0 0 1 0 1
— 0x02 — — — — — — — —
251/256 0x02 1 1 1 1 1 0 1 1
252/256 0x02 1 1 1 1 1 1 0 0
253/256 0x02 1 1 1 1 1 1 0 1
254/256 0x02 1 1 1 1 1 1 1 0
255/256 (max on) 0x02 1 1 1 1 1 1 1 1
Table 27. Panel Intensity Register Format