Rainbow Electronics MAX8760 - Manual (Page 35)

MAX8760
Dual-Phase, Quick-PWM Controller for AMD
Mobile Turion 64 CPU Core Power Supplies
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medium-sized MOSFETs. However, high-current appli-
cations driving large, high-side, MOSFETs require
boost capacitors larger than 0.1µF. For these applica-
tions, select the boost capacitors to avoid discharging
the capacitor more than 200mV while charging the
high-side MOSFET’s gates:
where N is the number of high-side MOSFETs used for
one regulator, and Q
GATE is the gate charge specified in
the MOSFET’s data sheet. For example, assume two
IRF7811W n-channel MOSFETs are used on the high
side. According to the manufacturer’s data sheet, a
single IRF7811W has a maximum gate charge of 24nC
(V
GS
= 5V). Using the above equation, the required boost
capacitance would be:
Selecting the closest standard value, this example
requires a 0.22µF ceramic capacitor.
Current-Balance Compensation (CCI)
The current-balance compensation capacitor (C CCI ) inte-
grates the difference between the main and secondary
current-sense voltages. The internal compensation resis-
tor (R
CCI = 20k
Ω) improves transient response by
increasing the phase margin. This allows the dynamics of
the current-balance loop to be optimized. Excessively
large capacitor values increase the integration time con-
stant, resulting in larger current differences between the
phases during transients. Excessively small capacitor val-
ues allow the current loop to respond cycle-by-cycle but
can result in small DC current variations between the
phases. Likewise, excessively large resistor values can
also cause DC current variations between the phases.
Small resistor values reduce the phase margin, resulting
in marginal stability in the current-balance loop. For most
applications, a 470pF capacitor from CCI to the switching
regulator’s output works well.
Connecting the compensation network to the output
(V
OUT ) allows the controller to feed-forward the output
voltage signal, especially during transients. To reduce
noise pickup in applications that have a widely distrib-
uted layout, it is sometimes helpful to connect the com-
pensation network to the quiet analog ground rather
than V
OUT .
Setting Voltage Positioning
Voltage positioning dynamically lowers the output volt-
age in response to the load current, reducing the
processor’s power dissipation. When the output is
loaded, an operational amplifier (Figure 5) increases
the signal fed back to the quick-PWM controller’s feed-
back input. The adjustable amplification allows the use
of standard, current-sense resistor values, and signifi-
cantly reduces the power dissipated since smaller cur-
rent-sense resistors can be used. The load transient
response of this control loop is extremely fast, yet well
controlled, so the amount of voltage change can be
accurately confined within the limits stipulated in the
microprocessor power-supply guidelines.
The voltage-positioned circuit determines the load current
from the voltage across the current-sense resistors
(R
SENSE = R CM = R CS ) connected between the inductors
and output capacitors, as shown in Figure 10. The voltage
drop can be determined by the following equation:
where η
SUM
is the number of phases summed together
for voltage-positioning feedback, and
η
TOTAL
is the total
number of active phases. When the slave controller is
disabled, the current-sense summation maintains the
proper voltage-positioned slope. Select the positive
input summing resistors so R
FBS = R F and R A = R B .
Minimum Input Voltage Requirements
and Dropout Performance
The nonadjustable minimum off-time one-shot and the
number of phases restrict the output voltage adjustable
range for continuous-conduction operation. For best
dropout performance, use the slower (200kHz) on-time
settings. When working with low input voltages, the
duty-factor limit must be calculated using worst-case
values for on- and off-times. Manufacturing tolerances
and internal propagation delays introduce an error to
the TON K factor. This error is greater at higher fre-
quencies (Table 6). Also, keep in mind that transient
response performance of buck regulators operated too
close to dropout is poor, and bulk output capacitance
must often be added (see the V
SAG equation in the
Design Procedure section).
The absolute point of dropout is when the inductor cur-
rent ramps down during the minimum off-time (
∆I
DOWN )
as much as it ramps up during the on-time ( ∆I
UP ). The
ratio h =
∆I
UP /
∆I
DOWN is an indicator of the ability to
V A I R
A
R
R
VPS VPS LOAD SENSE
VPS
SUM
F
TOTAL
B
=
=
η
η
C
x nC
mV
F
BST
= =
2 24
200
0 24 .
µ
C
N x Q
mV
BST
GATE =
200