Intel 80C188XL - Manual (Page 282)

10-27
DIRECT MEMORY ACCESS UNIT
Example 10-2. Timed DMA Transfers (Continued)
; NOW WE NEED TO SET THE PARAMETERS FOR THE CHANNEL AS FOLLOWS:
;
;
DESTINATION SOURCE
; ----------- ------
; I/O SPACE MEMORY SPACE
; CONSTANT PTR INCREMENT PTR
;
; TERMINATE ON TC, INTERRUPT, SOURCE SYNCHRONIZE, INTERNAL REQUESTS,
; LOW PRIORITY RELATIVE TO CHANNEL 1, BYTE XFERS.
MOV AX, 0001011101010110B
MOV DX, D0CON
OUT DX, AX
; NOW WE ASSUME THAT TIMER 2 HAS BEEN PROPERLY PROGRAMMED FOR A 22uS DELAY.
; WHEN THE TIMER IS STARTED, A DMA TRANSFER WILL OCCUR EVERY 22uS.
CODE_SEG ENDS
DATA_SEG SEGMENT
WAVEFORM_DATADB 0,1,2,3,4,5,6,7,8,9,10,11,12,13
DB 14,15,16,17,18,19,20,21,22,23,24
; ETC., UP TO 255
DATA_SEG ENDS
END START