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4 operation status register set, 5 questionable status register set, Operation status register set -7 – KEPCO KLR Series Developers Guide User Manual

Page 17: Questionable status register set -7

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KLR-DEV 060713

1-7

• 4 - Execution Error — 1 indicates execution error has occurred (parameter exceeded

allowable range) (see Appendix B, Table B-5 for details).

• 5 - Command Error — 1 indicates a command syntax error has occurred (see Appendix

B, Table B-5 for details).

• 6 - User Request — Not used (always zero).

• 7 - Power On — set once upon power-up, however ESE bit 7 set to 0 prevents Status

Byte bit 5 from being set.

1.2.7.4

OPERATION STATUS REGISTER SET

The Operation Status register set is comprised of condition, transition, event and enable regis-
ters (see Figure 1-2). Appendix B, PAR’s B.58 through B.61 provide detailed explanations of the
queries/commands for reading and modifying these registers as applicable; the transition regis-
ter cannot be modified.

The Operation condition registers record conditions which are a part of the instrument’s normal
operation. The definition of each of these bits (condition register) is as follows:

• 0 through 4 — Not used (always zero).

• 5 - Waiting for Trigger Summary — 1 indicates the unit is waiting for trigger

• 6 and 7 — Not used (always zero).

• 8 - Constant Voltage — 1 indicates the instrument is in constant voltage mode.

• 9 — Not used (always zero).

• 10 - Constant Current — 1 indicates the instrument is in constant current mode.

• 11 through 13 — Not used (always zero).

• 14 - Program Running — 1 indicates the program is running.

• 15 — Not used (always zero).

1.2.7.5

QUESTIONABLE STATUS REGISTER SET

The Questionable Status register set is comprised of condition, transition, event and enable reg-
isters (see Figure 1-2). Appendix B, PAR’s B.63 through B.66 provide detailed explanations of
the queries/commands for reading and modifying these registers as applicable; the transition
register cannot be modified.

The Questionable Condition register (see Figure 1-1) contains status bits representing data/sig-
nals which give an indication of the quality of various aspects of the signal.