B.63 status:questionable[:event]? query, B.64 status:questionable:condition? query, B.65 status:questionable:enable command – KEPCO KLP Series Developer's Guide, Rev 1 User Manual
Page 123: B.66 status:questionable:enable? query, B.67 system:communication:gpib:address command, B.63, Stat, B.64, B.65, B.66

KLP 031113
B-17
B.63 STATus:QUEStionable[:EVENt]? QUERY
STAT:QUES?
Syntax:
Short Form: STAT:QUES[EVEN]?
Long Form: STATus:QUEStionable[EVENT]?
Return Value:
Description: Indicates questionable events that occurred since previous STAT:QUES? query. Returns the
value of the Questionable Event register (see Table B-3). The Questionable Event register is a
read-only register which holds (latches) all events. Reading the Questionable Event register clears it.
(See example, Figure B-6.)
NOTE: Removing source power from the unit (e.g., setting POWER ON/OFF circuit breaker to OFF)
causes the unit to generate and store the PWR bit. Therefore the first query of the Questionable Event
Register after the unit is turned on will always show a PWR fault - this is normal.
B.64 STATus:QUEStionable:CONDition? QUERY
STAT:QUES:COND?
Syntax:
Short Form: STAT:QUES:COND?
Long Form: STATus:QUEStionable:CONDition?
Return Value:
Description: Returns the value of the Questionable Condition Register (see Table B-3). The Questionable
Condition Register contains unlatched real-time information about questionable conditions of the
power supply. Bit set to 1 = condition (active, true); bit reset to 0 = condition (inactive, false). (See
example, Figure B-6.)
B.65 STATus:QUEStionable:ENABle COMMAND
STAT:QUES:ENAB
Syntax:
Short Form: STAT:QUES:ENAB
Long Form: STATus:QUESionable:ENABle
Function:
Programs Questionable Condition Enable Register.
Description: Programs Questionable Condition Enable Register (see Table B-3).The Questionable Condition
Enable Register determines which conditions are allowed to set the Questionable Condition Register;
it is a mask for enabling
specific bits in the Questionable Event register that can cause the question-
able summary bit (bit 3) of the Status Byte register to be set. The questionable summary bit is the log-
ical OR of all the enabled bits in the Questionable Event register
.
Bit set to 1 = function enabled
(active, true); bit reset to 0 = function disabled (inactive, false)
.
(See example, Figure B-6.)
B.66 STATus:QUEStionable:ENABle? QUERY
STAT:QUES:ENAB?
Syntax:
Short Form: STAT:QUES:ENAB?
Long Form: STATus:QUEStionable:ENABle?
Return Value:
Description: Reads Questionable Condition Enable Register (see Table B-3). Power supply returns value of
Questionable Condition Enable Register, indicating which conditions are being monitored. Bit set to 1
= function enabled (active, true); bit reset to 0 = function disabled (inactive, false)
.
Related Com-
mands: STAT:QUES?. (See example, Figure B-6.)
B.67 SYSTem:COMMunication:GPIB:ADDRess COMMAND
SYST:COMM:GPIB:ADDR
Syntax:
Short Form: SYST:COMM:GPIB:ADDR
Long Form: SYSTem:COMMunication:GPIB:ADDRess
Description: Sets selected power supply GPIB address.
TABLE B-3. QUESTIONABLE EVENT REGISTER, QUESTIONABLE CONDITION REGISTER
AND QUESTIONABLE CONDITION ENABLE REGISTER BITS
CONDITION
NU
M/S
FAN
PWR
OTP
OLF
OCP
OVP
BIT
15 - 7
6
5
4
3
2
1
0
VALUE
32,768 - 128
64
32
16
8
4
2
1
M/S - MASTER/SLAVE FAILURE
FAN - INTERNAL FAN FAILURE
PWR - LOSS OF SOURCE POWER
OTP - OVERTEMPERATURE
OLF - OUTPUT LEAD FAULT
OCP - OVERCURRENT
OVP - OVERVOLTAGE
NU - NOT USED