Measurement Computing CIO-PDMAxx - Manual (Page 24)

5.2.11 REP mode ARM register
This is a write-only register. In continuous REP mode, a write to this register arms the
sample counter. Once armed, the sample counter does not start decrementing until a
half- full FIFO boundary has been reached. Data is don’t-care.
Base Address + Dh
X X X X X X X X
0 1 2 3 4 5 6 7
LSB
5.2.12 FIFO Register
The FIFO is accessed via this 16-bit read/write register at BASE + Eh.
The data format is:
Base Address + Eh
B0 B1 B2 B3 B4 B5 B6 B7
8 9 10 11 12 13 14 15
MSB
A0 A1 A2 A3 A4 A5 A6 A7
0 1 2 3 4 5 6 7
LSB
20