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Timing mode, Encoder mode, Counter/totalize mode – Measurement Computing WBK17 User Manual

Page 12

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WBK17, pg. 12

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WBK17, Counter/Encoder Module

Timing Mode

(see page 19).

OPT2: Determines whether the time is to be measured with a 16-bit counter (Counter Low);

or a 32-bit counter (Counter High).

Encoder Mode

(see page 20).

OPT[1:0]: Determines the encoder measurement mode: 1X, 2X, or 4X.
OPT2: Determines whether the counter is 16-bits (Counter Low); or 32-bits (Counter High).
OPT3: Determines which signal latches the counter outputs into the data stream going back to the
WaveBook. Start of scan or mapped channel.
OPT4: Allows the mapped channel to gate the counter.
OPT5: Allows the mapped channel to clear the counter for Z reference.

Counter/Totalize Mode

The counter mode allows basic use of a 32-bit counter. While in this mode, the channel’s input can only
increment the counter upward. When used as a 16-bit counter (Counter Low), one channel can be scanned
at the 1MHz rate. When used as a 32-bit counter (Counter High), two sample times are used to return the
full 32-bit result. Therefore a 32-bit counter can only be sampled at a 500kHz maximum rate. If only the
upper 16 bits of a 32-bit counter are desired then that upper word can be acquired at the 1MHz rate.

The first scan of an acquisition always zeroes all counters. It is usual for all counter outputs to be latched at
the beginning of each scan; however, there is an option to change this. A second channel, referred to as the
“mapped” channel, can be used to latch the counter output. The mapped channel can also be used to:

gate the counter

increment the counter

decrement the counter

The mapped channel can be any of the eight input channels (post-debounce), or any of the eight detection
signals. Each channel has its own detection signal that goes active when any of the sixteen counter value
setpoints has been reached. A detailed explanation of

pattern detection

begins on page 31 of this document

module.

Counter/Totalize Mode

An explanation of the various counter options, depicted in the previous figure, follows.