BECKHOFF EL9800 Basisplatine - Manual (Page 5)

Content
EL9800 3
FIGURES
Figure 1 Overview about the EL9800 ............................................................................................................8
Figure 2 Power Supply ..................................................................................................................................9
Figure 3 Pinout of the header J1203 .............................................................................................................9
Figure 4 Header J1200 – Selection of the PDI header voltage .....................................................................9
Figure 5 Connection area fort he EtherCAT postage stamp ...................................................................... 10
Figure 6 Pinout of the connectors J202 and TP202 ................................................................................... 10
Figure 7 PDI-Selection Area ....................................................................................................................... 12
Figure 8 Pinout of the connector J1201 ..................................................................................................... 13
Figure 9 µ-Controller PDI-Interface ............................................................................................................ 14
Figure 10 Power pins on the connectors TP208 and J208 ........................................................................ 14
Figure 11 Digital IO PDI-Interface .............................................................................................................. 17
Figure 12 Voltages on the headers TP207 und J207 ................................................................................. 19
Figure 13 PIC PDI-Interface ....................................................................................................................... 19
Figure 14 Configuration and Status-Area of the Distributed Clocks .......................................................... 22
Figure 15 FPGA Programming Interface .................................................................................................... 23
Figure 16 PIC Programming Interface ........................................................................................................ 24
Figure 17 Quartus II Programmer™ ........................................................................................................... 26
Figure 18 Hardware Setup Dialog .............................................................................................................. 27
Figure 19 Setup Dialog – USB Blaster selected......................................................................................... 27
Figure 20 Quartus II Programmer Dialog after „Auto-Detect“ processing .................................................. 28
Figure 21 Convert Programming Files ....................................................................................................... 29
Figure 22 Selection of the programming file ............................................................................................... 30