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Table 5-2, Clock structure – Artesyn COMX-P40x0 ENP2 Installation and Use (August 2014) User Manual

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Clock Structure

COMX-P40x0 ENP2 Installation and Use (6806800R95B)

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Bank1_SEL_FS0=1, 125MHz

Bank2_SEL_S1=1, 125MHz

*Default:100MHz

*Default:125MHz

Table 5-2 Configuration of the frequency of SERDES reference clock by GPIO

SERDES bank 1 reference clock

SERDES bank 2 reference clock

CPU_GPIO23=0, 100MHz

CPU_GPIO24=0, 100MHz

CPU_GPIO23=1, 125MHz

CPU_GPIO24=1, 125MHz

Default:100MHz

Default:125MHz

Table 5-1 Configuration of the frequency of SERDES reference clock by carrier (continued)

SERDES bank 1 reference clock select (pin B97
on COME)

SERDES bank 2/3 reference clock select (pin B98
on COME)