Artesyn COMX-P40x0 ENP2 Installation and Use (August 2014) - Manual (Page 77)

Functional Description
COMX-P40x0 ENP2 Installation and Use (6806800R95B) 77
4.18.4 I2C Device RTC
The real time clock M41S62L is located on I2C2, U2100 and the device address is 0xD0. It
provides a 32KHz clock output and interrupt to the CPU.
4.18.5 I2C Device Clock Generators
One clock generator ICS9FG104 is located on I2C1, U17 and the device address is 0xDC. The
second clock generator ICS9FG104 is located on I2C2, U40 with a device address of 0xDC.
The ICS9FG104 is a Frequency Timing Generator that provides four differential output pairs
that are compliant to the Intel CK410 specification. The part synthesizes several output
frequencies from a 25 MHz crystal. It provides outputs with cycle-to-cycle jitter of less than 50
ps and output-tooutput skew of less than 35 ps.
Frequency selection can be accomplished via strap pins or SMBus control. By default, strap pins
are used.
The input clock for the first clock generator is 25MHz and three differential output pairs are
provided. First pair are connected to SerDes Bank 1, second pair are connected to x2 Aurora
Connector, and third pair are connected to COM Express connector. The second clock
generator also uses a 25MHz input reference with three output pairs. The first pair drives
SERDES bank 2, the second pair drives SERDES bank 3, and the third is connected to the COM
Express connector.
The frequency of the first clock generator (bank 1 SERDES and Aurora) is selected through the
FS0 strap pin which is connected to GPIO23 of the CPU and pin B97 of the COM Express
connector. When low the frequency is 100MHz and when high it is 125MHz. The frequency of
the second clock generator (bank 2 and 3 SERDES) is also selected through the FS0 strap pin
which is connected to GPIO24 of the CPU and pin B98 of the COM Express connector. When low
the frequency is 100MHz and when high it is 125MHz.