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Stratix II GX EP2SGX90 Transceiver Signal Integrity Development Board
Manual
Altera Stratix II GX EP2SGX90 Transceiver Signal Integrity Development Board User Manual
Altera Measuring instruments
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Altera Stratix II GX EP2SGX90 Transceiver Signal Integrity Development Board User Manual | 40 pages
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Table of contents
Document Outline
Stratix II GX EP2SGX90 Transceiver Signal Integrity Development Board
Contents
About this Manual
Revision History
How to Contact Altera
Typographic Conventions
1. Introduction
General Description
Board Component Blocks
Block Diagram
Target Applications
Data Rate & Clock Frequency Support Per Protocol
Handling the Board
2. Board Components & Interfaces
Board Overview
Featured Device
Clocking Circuitry
Clock Buffer Functional Descriptions
ICS557-03 (U5): Spread Spectrum Clock Generator for PCI-Express
ICS8543 (U8): General Purpose 1:4 Differential Fanout Buffer
ICS83023 (U7): Differential I/O to Single Converter for Trigger Clock
Interfaces
SMA Connectors for High-Speed I/O
USB Interface
General User Interfaces
Debug Header (J1)
LEDs (D1 Through D8)
7-Segment Displays (D9, D10)
Push-Button Switches (S1 Through S6)
DIP Switches (S7 and S8)
Clock Selection Switches (S9 and S10)
Power Supply
Thermal Management Block
FPGA Configuration Block
JTAG Configuration
Active Serial Configuration Using EPCS64 Device (U22)
Flash Memory
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