Altera Cyclone III Development Board User Manual

Page 61

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Chapter 2: Board Components

2–51

On-Board Memory

© March 2009 Altera Corporation

Cyclone III 3C120 Development Board Reference Manual

U11 pin C2

Data 41

SSTL18 Class 1

DDR2_DQ41

C11

U11 pin D7

Data 42

SSTL18 Class 1

DDR2_DQ42

A7

U11 pin D3

Data 43

SSTL18 Class 1

DDR2_DQ43

C10

U11 pin D1

Data 44

SSTL18 Class 1

DDR2_DQ44

E11

U11 pin D9

Data 45

SSTL18 Class 1

DDR2_DQ45

B6

U11 pin B1

Data 46

SSTL18 Class 1

DDR2_DQ46

H13

U11 pin B9

Data 47

SSTL18 Class 1

DDR2_DQ47

D10

U12 pin G8

Data 48

SSTL18 Class 1

DDR2_DQ48

C17

U12 pin G2

Data 49

SSTL18 Class 1

DDR2_DQ49

B19

U26 pin H9

Data 5

SSTL18 Class 1

DDR2_DQ5

AH23

U12 pin H7

Data 50

SSTL18 Class 1

DDR2_DQ50

B18

U12 pin H3

Data 51

SSTL18 Class 1

DDR2_DQ51

C19

U12 pin H1

Data 52

SSTL18 Class 1

DDR2_DQ52

D20

U12 pin H9

Data 53

SSTL18 Class 1

DDR2_DQ53

C16

U12 pin F1

Data 54

SSTL18 Class 1

DDR2_DQ54

A19

U12 pin F9

Data 55

SSTL18 Class 1

DDR2_DQ55

E17

U12 pin C8

Data 56

SSTL18 Class 1

DDR2_DQ56

C21

U12 pin C2

Data 57

SSTL18 Class 1

DDR2_DQ57

C22

U12 pin D7

Data 58

SSTL18 Class 1

DDR2_DQ58

A21

U12 pin D3

Data 59

SSTL18 Class 1

DDR2_DQ59

A22

U26 pin F1

Data 6

SSTL18 Class 1

DDR2_DQ6

AE19

U12 pin D1

Data 60

SSTL18 Class 1

DDR2_DQ60

C24

U12 pin D9

Data 61

SSTL18 Class 1

DDR2_DQ61

B21

U12 pin B1

Data 62

SSTL18 Class 1

DDR2_DQ62

D21

U12 pin B9

Data 63

SSTL18 Class 1

DDR2_DQ63

E18

U13 pin C8

Data 64

SSTL18 Class 1

DDR2_DQ64

E22

U13 pin C2

Data 65

SSTL18 Class 1

DDR2_DQ65

C25

U13 pin D7

Data 66

SSTL18 Class 1

DDR2_DQ66

A23

U13 pin D3

Data 67

SSTL18 Class 1

DDR2_DQ67

B25

U13 pin D1

Data 68

SSTL18 Class 1

DDR2_DQ68

A26

U13 pin D9

Data 69

SSTL18 Class 1

DDR2_DQ69

F21

U26 pin F9

Data 7

SSTL18 Class 1

DDR2_DQ7

AF24

U13 pin B1

Data 70

SSTL18 Class 1

DDR2_DQ70

B26

U13 pin B9

Data 71

SSTL18 Class 1

DDR2_DQ71

D22

U26 pin C8

Data 8

SSTL18 Class 1

DDR2_DQ8

AG18

U26 pin C2

Data 9

SSTL18 Class 1

DDR2_DQ9

AG17

U26 pin F7

Data strobe 0

SSTL18 Class 1

DDR2_DQS0

AE18

U26 pin B7

Data strobe 1

SSTL18 Class 1

DDR2_DQS1

AF17

Table 2–51. DDR2 Interface I/O (Part 3 of 5)

Board

Reference

Description

I/O Standard

Schematic

Signal Name

Cyclone III
Device Pin

Number