Altera Viterbi Compiler - Manual (Page 25)

Trellis Termination
Block decoders must properly decode the last bits of the block and adapt to the convolutional encoder.
Tail-biting feeds the convolutional encoder with a block and terminates it with (L – 1) unknown bits
taken from the end of the block. Tail-biting sets the initial state of the convolutional encoder with the last
(L – 1) information bits. Tail-biting is decoded by replicating the block at the decoder or double feeding
the block into the decoder. By decoding in the middle point, the trellis is forced into the state that is both
the initial state and the end state. From the first decoding block, you can take the last half of the block;
from the second decoded block (or second pass through the decoder), you can obtain the first half of the
bits of the block.
Note: In tail-biting, the block size must be large enough to train the decoder, otherwise you may see BER
loss.
Alternatively, if you initialize the convolutional encoder to zero, the initial state of the trellis is zero. The
decoder knows the last (L – 1) bits to the convolutional encoder. They bring the convolutional encoder to
a known end state. The decoder then uses this information to set the end state of the trellis with
tr_init_state
, which is derived from the last (L – 1) bits of the block in reverse order. For example, for a
block that ends in: ...000101 If L = 5 and the decoder knows the last (L – 1) = 4 bits, it sets
tr_init_state
as 0101, which reversed and in binary is 1010, or 10 in decimal. The wizard generates
tr_init_state
as if
it knows the last (L – 1) bits of each block.
Trellis Initialization
The parallel decoder always starts its trellis from state zero for a new block.
However, the hybrid decoder allows you to set the initial state (usually zero) with
bm_init_state
. This
signal ranges from 0 to 2 (L – 1) – 1, which are the trellis states. The
bm_init_value
signal initializes the
state metric of the state indicated by
bm_init_state
. The decoder initializes all other states with zero. The
appropriate value for this port is approximately 2 (bmgwide – 2) or any value between 2 (N + softbits) to 2 (bmgwide –
1) . Continuous decoders never reset the state metrics, which creates a possible difference if the same block
of data is sent several times. Initially, the decoder sets the state metrics so that the state metric for state 0 is
0, and all others infinity. For any subsequent blocks, the state metrics contain whatever they have when
the previous block ends.
Viterbi IP Core Parameters
Architecture
Table 3-1: Architecture Parameters
Parameter Value Description
Viterbi architecure Hybrid or Parallel Selects the hybrid or parallel
architecture.
UG-VITERBI
2014.12.15
Trellis Termination 3-7
Viterbi IP Core Functional Description Altera Corporation
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