Altera Signal Integrity Development Kit, Stratix V GX Edition - Manual (Page 23)

Chapter 6: Board Test System 6–3
Running the Board Test System
July 2012 Altera Corporation Transceiver Signal Integrity Development Kit
Stratix V GX Edition User Guide
Running the Board Test System
To run the application, navigate to the
\kits\stratixVGX_5sgxea7nf40_si\examples\board_test_system
directory and run the BoardTestSystem.exe application.
1
In Windows, click Start > All Programs > Altera > Transceiver Signal Integrity
Development Kit, Stratix V GX Edition
<version> > Board Test System to run the
application.
A GUI appears, displaying the application tab that corresponds to the design running
in the FPGA. The Stratix V GX transceiver signal integrity development board’s flash
memory ships preconfigured with the design that corresponds to the GPIO and Flash
tabs.
1
If you power up your board with the Load Selector (J28) in the factory position (jump
pins 2-3), or if you load your own design into the FPGA with the Quartus II
Programmer, you receive a message prompting you to configure your board with a
valid Board Test System design. Refer to
“The Configure Menu” for information about
configuring your board.
Using the Board Test System
This section describes each control in the Board Test System application.
The Configure Menu
Use the Configure menu ( Figure 6–2 ) to select the design you want to use. Each design
example tests different functionality that corresponds to one or more application tabs.
To configure the FPGA with a test system design, perform the following steps:
1. On the Configure menu, click the configure command that corresponds to the
functionality you wish to test.
2. In the dialog box that appears, click Configure to download the corresponding
design’s SRAM Object File (.sof) to the FPGA. The download process usually takes
less than a minute.
Figure 6–2. The Configure Menu