Estimating power before starting the fpga design, Table 2–1 – Altera PowerPlay Early Power Estimator User Manual
Page 12

2–2
Altera
Corporation
PowerPlay Early Power Estimator For Stratix II, Stratix II GX & HardCopy II
January 2007
Estimating Power
To use the PowerPlay Early Power Estimator, enter the device resources, 
operating frequency, toggle rates and other parameters in the PowerPlay 
Early Power Estimator. If you do not have an existing design, then you 
need to estimate the number of device resources your design uses in 
order to enter the information into the PowerPlay Early Power Estimator.
Estimating Power Before Starting the FPGA Design
FPGAs provide the convenience of a shorter design cycle and faster 
time-to-market than ASICs or ASSPs. This means that the board design 
often takes places during the FPGA design cycle, and the power planning 
for the device can happen before any of the FPGA design is complete.
Table 2–1
shows the advantages and disadvantages of using the
PowerPlay Early Power Estimator spreadsheet before you begin the 
FPGA design. 
To estimate power usage with the PowerPlay Early Power Estimator 
spreadsheet if you have not started your FPGA design, perform the 
following steps:
1.
Download the PowerPlay Early Power Estimator spreadsheet from 
the Altera website (www.altera.com).
2.
Select the target family, device, and package from the PowerPlay 
Early Power Estimator’s Family, Device, and Package sections.
3.
Enter values for each section in the PowerPlay Early Power 
Estimator. Different worksheets in the file display different power 
sections, such as clocks and PLLs. Power is calculated automatically, 
and subtotals are given for each section.
4.
The calculator displays the estimated power usage in the Total 
section.
Table 2–1. Power Estimation Before Designing FPGA
Advantages
Disadvantages
●
Power estimation can be 
performed before starting your 
FPGA design
●
Accuracy depends on your inputs and 
your estimation of the device resources; 
where this information may change 
(during or after your design is 
complete), your power estimation 
results may be less accurate
●
Process can be time consuming
