Altera Cyclone V SoC - Manual (Page 35)

Chapter 5: Board Test System 5–17
The Clock Control
November 2013 Altera Corporation Cyclone V SoC Development Kit
User Guide
■ Stop —Stops the communication with the board to monitor power.
■ Update speed —Specifies how often to refresh the graph.
■ Log Results —Specifies that a log file is saved to
dir>\kits\cycloneVSX_5csxfc6df31_soc\examples\board_test_system.
■ MAX V version —Indicates the version of MAX V code currently running on the
board. The MAX V code resides in the dir>\kits\cycloneVSX_5csxfc6df31_soc\factory_recovery and dir>\kits\cycloneVSX_5csxfc6df31_soc\examples\max5 directories.
1 Newer revisions of this code might be available on the Cyclone V SoC
Development Kit page of the Altera website.
f
A table with the power rail information is available in the Cyclone V SoC Development
Board Reference Manual .
The Clock Control
The Clock Control application sets the Si570 (X1) or Si571 (X3) programmable
oscillators to any frequency between 10 MHz and 810 MHz. The frequencies support
eight digits of precision to the right of the decimal point.
The Clock Control application runs as a stand-alone application. ClockControl.exe
resides in the dir>\kits\cycloneVSX_5csxfc6df31_soc\examples\board_test_system directory.
To start the application, click Start > All Programs > Altera >
Cyclone V SoC Development Kit
<version> > Clock Control.
f For more information about the Si570/Si571 and the Cyclone V development board’s
clocking circuitry and clock input pins, refer to the Cyclone V SoC Development Board
Reference Manual .