MUTEC iClock - Manual (Page 12)

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Manual SDs-01 D 3.2.2003 17:45 Uhr Seite 8
Wiring the AES/EBU and S/P-DIF interfaces
Connect the AES/EBU interfaces with the help of balanced electrical
cables equipped with XLR connectors on both ends. The specifications
stipulate a specific cable resistance of 110Ω (ask your retailer for a confir-
mation of this value when purchasing the cables).
Connect the coaxial S/P-DIF interface with the help of unbalanced electri-
cal cables equipped with cinch connectors on both ends. The specifications
stipulate a specific cable resistance of 75Ω (ask your retailer for a confirma-
tion of this value when purchasing the cables).
Cables for High Clock Rates
Especially when working with high
AES3/-11 clock rates well shielded
clock lines are imperative to avoid increased
radiation! Standard cables are nor-mally
useable for clock rates up to 50.0kHz. Special
shielded cable material should be used for
transfer of higher clock rates.
!
Since some manufacturers offer optimized
cables for the transmission of digital S/P-DIF
and AES3/-11 signals, it will be a good idea
to ask your retailer for specific cables.
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