Figure 4-1: core configuration memory output – Achronix Bitporter User Manual
Page 36
Picking a STAPL Action (-a option)
Using the Achronix STAPL Player
PAGE 30
Bitporter User Guide
Core Configuration Memory Output
Each core configuration memory address frame contains 16,384 bits of configuration data (512
words of 32 bits), reported by the STAPL player as 128 x 128‐bit blocks for performance reasons.
Each 128‐bit block is composed of four 32‐bit words (
). The LSB of Word[0] is the
LSB of the 128‐bit chunk at offset 0 of a given address. The MSB of Word[3] is the MSB of the
128‐bit chunk at offset 0 of a given address. The LSB of Word[4] is the LSB of the 128‐bit chunk
at offset 1 of a given address. The MSB of Word[511] is the MSB of the 128‐bit chunk at offset
127 of a given address.
Successful Output Example
The example below shows partial results for a READ (actual results would contain 128 rows of
data for each address, and tens of thousands of addresses).
Command entered:
acx_stapl_player.exe example.jam -aREAD
The command returns:
Achronix STAPL Player (acx_stapl_player)
(c) Copyright Achronix Semiconductor Corp. All rights reserved.
contains elements of Jam STAPL Player Version 2.5 (20040526)
Copyright (C) 1997-2004 Altera Corporation
Entering JTAG programming mode...
Reading the programming data of the device...
Reading core configuration memory contents:
core address:
00 0000
0000 0003 0000 0002 0000 0001 0000 0000
0000 0007 0000 0006 0000 0005 0000 0004
0000 000B 0000 000A 0000 0009 0000 0008
0000 000F 0000 000E 0000 000D 0000 000C
Figure 4-1: Core Configuration Memory Output
WORD[3]
WORD[2]
WORD[1]
WORD[0]
Block[0]
WORD[7]
WORD[6]
WORD[5]
WORD[4]
Block[1]
WORD[11]
WORD[10]
WORD[9]
WORD[8]
Block[2]
WORD[31]
WORD[30]
WORD[29]
WORD[28]
Block[7]
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