Cirrus Logic CS8952 - Manual (Page 13)

CS8952
CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 13
DS206F1
10BASE-T MII TRANSMIT TIMING
Parameter Symbol Min Typ Max Unit
TXD[3:0] Setup to TX_CLK High t
SU1
10 - - ns
TX_ER Setup to TX_CLK High t
SU2
10 - - ns
TX_EN Setup to TX_CLK High t
SU3
10 - - ns
TXD[3:0] Hold after TX_CLK High t
HD1
0 - - ns
TX_ER Hold after TX_CLK High t
HD2
0 - - ns
TX_EN Hold after TX_CLK High t
HD3
0 - - ns
TX_EN “high” to CRS asserted latency t
CRS1
0 - 4 BT
TX_EN “low” to CRS de-asserted latency t
CRS2
0 - 16 BT
TX_EN “high” to TX+/- output (TX Latency) t
LAT
6 - 14 BT
SQE Timing
COL (SQE) Delay after CRS de-asserted t
COL
0.65 0.9 1.6 µs
COL (SQE) Pulse Duration t
COLP
0.65 1.0 1.6 µs
TX_CLK
TX_EN
TX_ER
TXD[3:0]
CRS
TX+/-
t
SU3
t
SU2
t
SU1
t
HD3
t
HD2
t
HD1
t
CRS1 t
CRS2
t
LAT
Valid
Data
Input/Output
Input
Input
Input
Output
Output
TX_CLK
t
SQE COL
t
SQEP
Input/Output
Output
SQE Timing
10BASE-T Transmit Timing