Figure 34. 10base-t receive layout details, Jumperless design, Serial eeprom – Cirrus Logic AN83 User Manual
Page 45: Reset configuration block, An83
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AN83
AN83REV3
45
able in a 16 pin DIP or 16 pin SOIC package. See
tables 4 and 5 for recommended part numbers.
JUMPERLESS DESIGN
Using the CS8900A, both add-in adapters and
motherboard solutions can be implemented without
hardware jumpers or switches. The CS8900A and
media access control (MAC) device drivers obtain
configuration information directly from nonvola-
tile memory. For add-in ISA adapters, a serial EE-
PROM will be connected directly to the CS8900A
via the serial interface. Motherboard solutions
may use an on-board serial EEPROM or other non-
volatile memory such as a flash EPROM-based
BIOS. Typically, a separate software utility is used
to initially store and modify the configuration in-
formation.
Serial EEPROM
Two types of configuration information is stored in
the EEPROM: configuration information automat-
ically loaded into the CS8900A after each reset and
driver configuration information used by the MAC
driver.
Reset Configuration Block
After each reset (except EEPROM reset) the
CS8900A checks to see if an EEPROM is connect-
ed. If an EEPROM is present, the CS8900A auto-
matically loads the first block of data stored in the
EEPROM into its internal registers. This block of
data is referred to as the Reset Configuration
Block. It is used to initialize the CS8900A after
each reset.
Software resets may occur frequently and perfor-
mance will be enhanced if chip re-initialization
takes as little time as possible. Therefore, since EE-
PROM readout takes approximately 25 µsec. per
word, the length of the Reset Configuration Block
should be kept to a minimum.
The MAC drivers provided by Cirrus will retain
much of the adapter’s configuration across soft-
Figure 34. 10BASE-T Receive Layout Details