Register quick reference, Va_sel, 0 for – Cirrus Logic CS4244 User Manual
Page 45: Vq ramp” bit in the, Dac control 4" register, Mclk rate[2:0]” bits in the, Clock & sp sel." register, Sdo chain” bit in the, Sp control" register, Dac1-4 source[2:0]” bits in the

DS900F1
45
CS4244
5. REGISTER QUICK REFERENCE
Default values are shown below the bit names
.
AD
Function
7
6 5 4 3 2 1 0
(Read Only Bits are shown in Italics)
01h
Device ID
A & B
DEV. ID A[3:0]
DEV. ID B[3:0]
0
1 0 0 0 0 1 0
02h
Device ID
C & D
DEV. ID C[3:0]
DEV. ID D[3:0]
0
0
1
1
0 1 0 0
03h
Device ID
E & F
DEV. ID E[3:0]
DEV. ID F[3:0]
0
0 0 0 0 0 0 0
04h
Variant ID
Reserved [3:0]
Reserved [3:0]
0
0 0 0 0 0 0 0
05h
Revision ID
ALPHA REV. ID[3:0]
NUMERIC REV. ID[3:0]
x
x
x
x
x
x
x
x
06h
Clock &
SP Sel.
BASE RATE[1:0]
SPEED MODE[1:0]
MCLK RATE[2:0]
Reserved
0
0 0 0 0 1 0 0
07h
Sample
Width Sel.
SDOUTx SW[1:0]
INPUT SW[1:0]
Reserved[1:0]
Reserved[1:0]
1
1 1 1 1 1 1 1
08h
SP Control
INV SCLK
Reserved[2:0]
SP FORMAT[1:0]
SDO CHAIN
MSTR/SLV
0
1 0 0 1 0 0 0
09h
SP Data
Sel.
Reserved
Reserved
DAC1-4 SOURCE[2:0]
Reserved[2:0]
0
0 0 0 0 0 0 1
0Ah
Reserved
Reserved[7:0]
1
1 1 1 1 1 1 1
0Bh
Reserved
Reserved[7:0]
1
1 1 1 1 1 1 1
0Ch
Reserved
Reserved[7:0]
1
1 1 1 1 1 1 1
0Dh
Reserved
Reserved[7:0]
1
1 1 1 1 1 1 1
0Eh
Reserved
Reserved
Reserved[2:0] Reserved[3:0]
0
0 0 0 0 0 0 0
0Fh
ADC
Control 1
Reserved
Reserved
VA_SEL
ENABLE
HPF
INV. ADC4
INV. ADC3
INV. ADC2
INV. ADC1
1
1
0 0 0 0 0 0
10h
ADC
Control 2
MUTE
ADC4
MUTE
ADC3
MUTE
ADC2
MUTE
ADC1
PDN
ADC4
PDN
ADC3
PDN
ADC2
PDN
ADC1
1
1 1 1 1 1 1 1
11h
Reserved
Reserved[2:0] Reserved
Reserved
Reserved
Reserved
Reserved
1
1 1 0 0 0 0 0
12h
DAC
Control 1
DAC1-4 NG[2:0]
DAC1-4 DE Reserved
Reserved
Reserved
1
1 1 0 0 0 0 0
13h
DAC
Control 2
Reserved[2:0] Reserved
INV.
DAC4
INV. DAC3
INV. DAC2
INV. DAC1
1
1 1 0 0 0 0 0
14h
DAC
Control 3
Reserved
DAC1-4
ATT.
Reserved
Reserved
MUTE DAC4
MUTE
DAC3 MUTE
DAC2 MUTE
DAC1
1
0 1 1 1 1 1 1
15h
DAC
Control 4
VQ RAMP
Reserved[1:0]
Reserved
PDN DAC4 PDN
DAC3 PDN
DAC2 PDN
DAC1
0
0 0 1 1 1 1 1