KEPCO BIT 4882F - Manual (Page 41)

BIT 4882 030507
A-3
OUTP[:STAT] = OFF. If the power supply is in either an overvoltage or overcurrent state, this condition
is reset by *RST. (See example, Figure A-1.)
FIGURE A-1. GPIB COMMANDS
A.10 *SRE — SERVICE REQUEST ENABLE COMMAND
*SRE
Syntax: *SRE where = value from 0 - 255 per Table A-3, except bit 6 cannot be pro-
grammed.
Description: Sets the condition of the Service Request Enable register. The Service Request Enable register
determines which events of the Status Byte Register are summed into the MSS (Master Status Sum-
mary) and RQS (Request for Service) bits. RQS is the service request bit that is cleared by a serial
poll, while MSS is not cleared when read. A "1" (1 = set = enable, 0 = reset = disable) in any Service
Request Enable register bit position enables the corresponding Status Byte bit to set the RQS and
MSS bits. All the enabled Service Request Enable register bits then are logically ORed to cause Bit 6
of the Status Byte Register (MSS/RQS) to be set. Related Commands: *SRE?, *STB?. (See exam-
ple, Figure A-1.)
*CLS Power supply clears status data.
*ESE 60 Power supply enables bits 5, 4, 3 and 2, allowing command error, execution
error, device dependent error and query error to set the Event Status
Summary bit when an STB command is executed.
*ESE? Returns 60, (value of the mask) verifying that bits 5, 4, 3 and 2 are enabled.
*ES Unknown command will set command error (Bit 5).
*ESR? Returns 32 (bit 5 set), indicating Command Error has occurred since the last
time the register was read.
*IDN? Power supply returns: KEPCO, BOP BIT 488 REV 1.
*OPC Allows status bit 0 to be set when pending operations complete
VOLT 21;CURR 3 Sets output voltage to 21V, output current to 3A
*ESR Returns 129 (128 + 1, power on, bit 7 = 1, operation complete, bit 1 = 1)
*ESR Returns 0 (event status register cleared by prior *ESR?)
VOLT 15;CURR 5;*OPC? Sets output voltage to 15V, output current to 5A, puts “1” on output bus when
command operations are complete.
*RST Power supply reset to power on default state.
*SRE 40 When ESB or QUES bits are set (Table A-3), the Request for Service bit will
be set.
*SRE? Returns the value of the mask (40).
*STB? For example, the Power supply responds with 96 (64 + 32) if MSS and the
Event Status Byte (Table A-3) summary bit have been set. The power supply
returns 00 if no bits have been set.
VOLT 25 Power supply voltage commanded to 25V.
VOLT:TRIG 12 Programs power supply voltage to 12V when *TRG received.
INIT Trigger event is initialized.
*TRG Power supply reverts to commanded output voltage of 12V.
** LOAD DISCONNECTED
*TST? Power supply executes self test and responds with 0 if test completed
successfully, with 1 if test failed.
TABLE A-3. SERVICE REQUEST ENABLE AND STATUS BYTE REGISTER BITS
CONDITION OPER
MSS
RQS
ESB MAV QUES
ERR
QUE
NU NU
BIT 7 6 5 4 3 2 1 0
VALUE 128 64 32 16 8 4 2 1
OPER Operation Status Summary
MSS Master Status Summary
RQS Request for Service
ESB Event Status Byte summary
MAV Message available
QUES QUEStionable Status Summary
ERR QUE 1 or more errors occurred (see
PAR. B.25)
NU (Not Used)