Asus RS120-E4/PA4 - Manual (Page 88)

5-22 Chapter 5: BIOS setup
Configure DRAM Timing by SPD [Enabled]
When this item is enabled, the DRAM timing parameters are set according to
the DRAM SPD (Serial Presence Detect). When disabled, you can manually
set the DRAM timing parameters through the DRAM sub-items. The following
sub-items appear when this item is Disabled.
Configuration options: [Disabled] [Enabled]
DRAM.CAS#.Latency.[5]
Controls the latency between the SDRAM read command and the time the data
actually becomes available. Configuration options: [5] [4] [3]
DRAM.RAS#.to.CAS#.Delay.[6.DRAM.Clocks]
Controls the latency between the DDR SDRAM active command and the read/write
command.
Configuration options: [2 DRAM Clocks] [3 DRAM Clocks] [4 DRAM Clocks]
[5 DRAM Clocks] [6 DRAM Clocks]
DRAM.RAS#.Precharge.[6.DRAM.Clocks]
Controls the idle clocks after issuing a precharge command to the DDR SDRAM.
Configuration options: [2 DRAM Clocks] [3 DRAM Clocks] [4 DRAM Clocks]
[5 DRAM Clocks] [6 DRAM Clocks]
DRAM.RAS#.Activate.to.Precha.[15.DRAM.Clocks]
Configuration options: [4 DRAM Clocks] [5 DRAM Clocks] ~ [15 DRAM Clocks]