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Ata6823 [preliminary, Esd and latch-up requirements – Rainbow Electronics ATA6823 User Manual

Page 26

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4856E–AUTO–07/07

ATA6823 [Preliminary]

10.2

Transients on Pin LIN

Transients to these pins are coupled capacitively to the IC and are valid for the application with
external circuitry concerning figure 6.

Values: Pulse 3a, Pulse 3b (see

Figure 10-3

and

Figure 10-4 on page 25

) coupled via 1 nF to

LIN, R

i

= 50

Acceptance level A

10.3

Conducted Emissions, Radiated Emissions and Susceptibility

The application using the IC described in this specification has to fulfill the demands of the fol-
lowing specifications:

• GM GMW3100 (2001-08)

• TL82166 (1998-02)

• TL82366 (2002-03)

• TL965 (1999-10)

It is the responsibility of both the deliverer and the user of the described IC to meet the men-
tioned specifications.

11. ESD and Latch-up Requirements

The device withstands pulses when tested according to ESD STM 5.1-1998:

• Constant voltage 2 kV

• R = 1.5 k

• C = 100 pF

1 pulse per polarity and per pin

3 samples, 0 failures

Electrical post stress testing at room temperature

Static latch-up tested according to AEC-Q100-004 and JESD78.

• 3 to 6 samples, 0 failures

• Electrical post stress testing at room temperature

In test, the voltage at the pins VBAT, LIN, CP, VBATSW, Hx, and Sx must not exceed 45V when
not able to drive the specified current.