Rainbow Electronics MAX8775 User Manual
Page 25

and:
where R
CS
is the required current-sense resistance,
and R
DCR
is the inductor’s series DC resistance. Use
the worst-case inductance and R
DCR
values provided
by the inductor manufacturer, adding some margin for
the inductance drop over temperature and load.
Output Capacitor Selection
The output filter capacitor must have low enough equiva-
lent series resistance (ESR) to meet output ripple and
load-transient requirements, yet have high enough ESR
to satisfy stability requirements. The output capacitance
must be high enough to absorb the inductor energy
while transitioning from full-load to no-load conditions
without tripping the overvoltage fault protection. When
using high-capacitance, low-ESR capacitors (see stabili-
ty requirements), the filter capacitor’s ESR dominates the
output voltage ripple. Therefore, the output capacitor’s
size depends on the maximum ESR required to meet the
output voltage ripple (V
RIPPLE(P-P)
) specifications:
In Idle Mode, the inductor current becomes discontinuous,
with peak currents set by the Idle Mode current-sense
threshold (V
IDLE
= 0.2V
LIMIT
). In Idle Mode, the no-load
output ripple can be determined as follows:
The actual capacitance value required relates to the
physical size needed to achieve low ESR, as well as to
the chemistry of the capacitor technology. Thus, the
capacitor is usually selected by ESR and voltage rating
rather than by capacitance value (this is true of tanta-
lums, OS-CONs, polymers, and other electrolytics).
When using low-capacity filter capacitors, such as
ceramic capacitors, size is usually determined by the
capacity needed to prevent V
SAG
and V
SOAR
from
causing problems during load transients. Generally,
once enough capacitance is added to meet the over-
shoot requirement, undershoot at the rising load edge
is no longer a problem (see the V
SAG
and V
SOAR
equa-
tions in the
Transient Response
section). However, low-
capacity filter capacitors typically have high ESR zeros
that may affect the overall stability (see the
Output
Capacitor Stability Considerations
section).
Output Capacitor Stability Considerations
Stability is determined by the value of the output zero
relative to the switching frequency. The boundary of
instability is given by the following equation:
where:
For a typical 300kHz application, the output zero fre-
quency must be well below 95kHz, preferably below
50kHz. Tantalum and OS-CON capacitors in wide-
spread use at the time of publication have typical ESR
zero frequencies of 25kHz. In the design example used
for inductor selection, the ESR needed to support
25mV
P-P
ripple is 25mV/1.5A = 16.7mΩ. One
330µF/2.5V Sanyo polymer (TPE) capacitor provides
7mΩ (max) ESR. Together with the 1.5mΩ current-
sense resistors, the output zero is 25kHz, zero is
25kHz, well within the bounds of stability.
The MAX8775 is optimized for low-duty-cycle opera-
tions. Steady-state operation at 45% duty cycle or higher
is not recommended.
The easiest method for checking stability is to apply a
very fast zero-to-max load transient and carefully
observe the output voltage ripple envelope for over-
shoot and ringing. It can help to simultaneously monitor
the inductor current with an AC current probe. Do not
allow more than one cycle of ringing after the initial
step-response under/overshoot.
Input Capacitor Selection
The input capacitor must meet the RMS ripple current
requirement (I
RMS
) imposed by the switching currents.
For a single step-down converter, the RMS input ripple
current is defined by the output load current (I
OUT
),
input voltage, and output voltage, with the worst-case
condition occurring at V
IN
= 2V
OUT
:
For a dual +180° interleaved controller, the out-of-
phase operation reduces the RMS input ripple current,
effectively lowering the input capacitance require-
ments. When both outputs operate with a duty cycle
less than 50% (V
IN
> 2V
OUT
), the RMS input ripple cur-
rent is defined by the following equation:
I
V
V
I
I
I
V
V
I
I
I
RMS
OUT
IN
OUT
OUT
IN
OUT
IN
OUT
OUT
IN
= ⎛
⎝⎜
⎞
⎠⎟
−
(
)
+ ⎛
⎝⎜
⎞
⎠⎟
−
(
)
1
1
1
2
2
2
I
I
V
V
V
V
RMS
OUT
OUT
IN
OUT
IN
=
−
(
)
f
R
R
C
ESR
ESR
SENSE
OUT
=
+
1
2
4
(
)
π
R
R
and f
f
ESR
SENSE
ESR
SW
<
≤
2
π
V
V
R
R
RIPPLE P P
IDLE ESR
SENSE
(
)
−
=
V
R
I
LIR
RIPPLE P P
ESR LOAD MAX
(
)
(
)
−
=
R
L
C
R
R
DCR
EQ
=
×
+
⎡
⎣⎢
⎤
⎦⎥
1
1
1
2
R
R
R
R
R
CS
DCR
=
+
2
1
2
MAX8775
Dual and Combinable Graphics Core
Controller for Notebook Computers
______________________________________________________________________________________
25